IP4778CZ38
HDMI ESD protection, DDC buffering and hot plug control
Rev. 02 — 12 February 2009
Product data sheet
1. General description
The IP4778CZ38 is designed for HDMI receiver host interface protection. The
IP4778CZ38 includes DDC buffering, slew rate acceleration and decoupling, Hot Plug
control, backdrive protection, CEC slew rate control, optional multiplexing of DDC signals,
and high-level ESD protection diodes for all HDMI signals.
The DDC lines are buffered using a new buffering concept which decouples the internal
capacitive load from the external capacitive load. This allows higher PCB design flexibility
for the DDC lines with respect to the maximum load of 50 pF specified in the
HDMI 1.3
specification.
This buffering also boosts the DDC signals, allowing the use of longer HDMI
cables having a higher capacitive load than 700 pF. The CEC slew rate limiter prevents
ringing on the CEC line and greatly reduces the number of discrete components needed
by the CEC application. HDMI receiver and system GPIO applications are simplified by an
internal Hot Plug driver module and Hot Plug control.
The DDC, Hot Plug and CEC lines are backdrive protected to guarantee HDMI interface
signals are not pulled down if the system is powered down or enters Standby mode.
All TMDS intra-pairs are protected by a special diode configuration offering a low line
capacitance of 0.7 pF only (to ground) and 0.05 pF between the TMDS pairs. These
diodes provide protection to components downstream from ESD voltages of up to
±8
kV
contact in accordance with the IEC 61000-4-2, level 4 standard.
2. Features
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HDMI 1.3 compliant
Pb-free and RoHS compliant
Robust ESD protection without degradation after several ESD strikes
Low leakage even after several hundred ESD discharges
Very high diode switching speed (ns) and low line capacitance of 0.7 pF to ground and
0.05 pF between channels ensures signal integrity
DDC capacitive decoupling between system side and HDMI connector side and drive
cable buffering with capacitive load (> 700 pF)
Hot Plug control for direct connection to system GPIO
CEC ringing prevention by slew rate limiter
DDC and Hot Plug enable signal for multiplexing and backdrive protection
All TMDS lines with integrated rail-to-rail clamping diodes with downstream ESD
protection of
±8
kV in accordance with IEC 61000-4-2, level 4
Matched 0.5 mm trace spacing
NXP Semiconductors
IP4778CZ38
HDMI ESD protection, DDC buffering and hot plug control
I
Component count reduction of HDMI receiver application
I
Highest integration in a small footprint, PCB-level, optimized RF routing, 38-pin
TSSOP lead-free package
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Choice of system compatible or RF routing optimized pinning variants
3. Applications
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The IP4778CZ38 can be used for a wide range of HDMI sink devices e.g.:
N
TV
N
Projectors
N
PC monitors
N
HDMI buffer modules (extensions of HDMI cable length)
N
HDMI picture performance quality enhancer modules
4. Ordering information
Table 1.
Ordering information
Package
Name
IP4778CZ38
IP4778CZ38/V
TSSOP38
Description
plastic thin shrink small outline package; 38 leads;
body width 4.4 mm; lead pitch 0.5 mm
Version
SOT510-1
Type number
IP4778CZ38_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 12 February 2009
2 of 26
NXP Semiconductors
IP4778CZ38
HDMI ESD protection, DDC buffering and hot plug control
5. Functional diagram
TMDS_D2+
TMDS_D1+
TMDS_BIAS
TMDS_D0+
TMDS_CLK+
5V0
TMDS_D2−
TMDS_D1−
TMDS_GND
TMDS_D0−
TMDS_CLK−
TMDS_BIAS
V
CC(5V0)
V
CC(3V3)
TMDS_BIAS
V
CC(5V0)
SLEW
RATE
ACCELERATOR
HOT_PLUG_DET_OUT
10
µA
HOT_PLUG_DET_IN
DDC_CLK_OUT
ENABLE
DDC_CLK_IN
TMDS_BIAS
V
CC(3V3)
TMDS_BIAS
V
CC(5V0)
SLEW
RATE
ACCELERATOR
CEC_OUT
CEC_IN
ENABLE
DDC_DAT_OUT
SLEW
RATE
LIMITER
DDC_DAT_IN
001aae863
Fig 1.
Functional diagram
IP4778CZ38_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 12 February 2009
3 of 26
NXP Semiconductors
IP4778CZ38
HDMI ESD protection, DDC buffering and hot plug control
6. Pinning information
6.1 Pinning
V
CC(5V0)
ENABLE
GND
TMDS_D2+
n.c.
TMDS_GND
TMDS_D1+
n.c.
TMDS_GND
1
2
3
4
5
6
7
8
9
38 TMDS_BIAS
37 V
CC(3V3)
36 GND
35 n.c.
34 TMDS_D2−
33 TMDS_GND
32 n.c.
31 TMDS_D1−
30 TMDS_GND
TMDS_D0+ 10
n.c. 11
TMDS_GND 12
TMDS_CLK+ 13
n.c. 14
TMDS_GND 15
CEC_IN 16
DDC_CLK_IN 17
DDC_DAT_IN 18
HOT_PLUG_DET_IN 19
IP4778CZ38
29 n.c.
28 TMDS_D0−
27 TMDS_GND
26 n.c.
25 TMDS_CLK−
24 TMDS_GND
23 CEC_OUT
22 DDC_CLK_OUT
21 DDC_DAT_OUT
20 HOT_PLUG_DET_OUT
001aag032
Fig 2.
Pin configuration of IP4778CZ38
V
CC(5V0)
ENABLE
GND
TMDS_D2+
TMDS_GND
n.c.
TMDS_D1+
TMDS_GND
n.c.
1
2
3
4
5
6
7
8
9
38 TMDS_BIAS
37 V
CC(3V3)
36 GND
35 n.c.
34 TMDS_GND
33 TMDS_D2−
32 n.c.
31 TMDS_GND
30 TMDS_D1−
TMDS_D0+ 10
TMDS_GND 11
n.c. 12
TMDS_CLK+ 13
TMDS_GND 14
n.c. 15
CEC_IN 16
DDC_CLK_IN 17
DDC_DAT_IN 18
HOT_PLUG_DET_IN 19
IP4778CZ38/V
29 n.c.
28 TMDS_GND
27 TMDS_D0−
26 n.c.
25 TMDS_GND
24 TMDS_CLK−
23 CEC_OUT
22 DDC_CLK_OUT
21 DDC_DAT_OUT
20 HOT_PLUG_DET_OUT
001aag031
Fig 3.
IP4778CZ38_2
Pin configuration of IP4778CZ38/V
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 12 February 2009
4 of 26
NXP Semiconductors
IP4778CZ38
HDMI ESD protection, DDC buffering and hot plug control
6.2 Pin description
Table 2.
Symbol
V
CC(5V0)
ENABLE
GND
TMDS_D2+
TMDS_GND
n.c.
TMDS_D1+
TMDS_GND
n.c.
TMDS_D0+
TMDS_GND
n.c.
TMDS_CLK+
TMDS_GND
n.c.
CEC_IN
DDC_CLK_IN
DDC_DAT_IN
HOT_PLUG_DET_IN
HOT_PLUG_DET_OUT
DDC_DAT_OUT
DDC_CLK_OUT
CEC_OUT
TMDS_CLK−
TMDS_GND
n.c.
TMDS_D0−
TMDS_GND
n.c.
TMDS_D1−
TMDS_GND
IP4778CZ38_2
Pin description
Pin
IP4778CZ38
1
2
3
4
6
5
7
9
8
10
12
11
13
15
14
16
17
18
19
20
21
22
23
25
24
26
28
27
29
31
30
IP4778CZ38/V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
supply voltage for DDC and Hot Plug
circuits
enable for DDC and Hot Plug circuits
ground for DDC, Hot Plug and CEC
circuits
[1]
ESD protection TMDS channel D2+
[2]
ground for TMDS channel
[1]
not connected
[2]
ESD protection TMDS channel D1+
[2]
ground for TMDS channel
[1]
not connected
[2]
ESD protection TMDS channel D0+
[2]
ground for TMDS channel
[1]
not connected
[2]
ESD protection TMDS channel
CLK+
[2]
ground for TMDS channel
[1]
not connected
[2]
CEC signal input to system
controller
[3]
DDC clock input to system
controller
[3]
DDC data input to system controller
[3]
Hot Plug Detect input from system
GPIO
[3]
Hot Plug Detect output to HDMI
connector
[4]
DDC data output to HDMI connector
[4]
DDC clock output to HDMI
connector
[4]
CEC signal output to HDMI
connector
[3]
ESD protection TMDS channel
CLK−
[2]
ground for TMDS channel
[1]
not connected
[2]
ESD protection TMDS channel D0−
[2]
ground for TMDS channel
[1]
not connected
[2]
ESD protection TMDS channel D1−
[2]
ground for TMDS channel
[1]
© NXP B.V. 2009. All rights reserved.
Description
Product data sheet
Rev. 02 — 12 February 2009
5 of 26