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IS46LQ32128EA-075BLA2

Description
DDR DRAM,
Categorystorage    storage   
File Size3MB,10 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Environmental Compliance
Download Datasheet Parametric View All

IS46LQ32128EA-075BLA2 Overview

DDR DRAM,

IS46LQ32128EA-075BLA2 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIntegrated Silicon Solution ( ISSI )
package instructionFBGA-200
Reach Compliance Codecompli
ECCN codeEAR99
Date Of I2019-10-23
access modeMULTI BANK PAGE BURST
Other featuresTERM PITCH-MAX
JESD-30 codeR-PBGA-B200
length14.5 mm
memory density4294967296 bi
Memory IC TypeDDR DRAM
memory width32
Number of functions1
Number of ports1
Number of terminals200
word count134217728 words
character code128000000
Operating modeSYNCHRONOUS
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
organize128MX32
Package body materialPLASTIC/EPOXY
encapsulated codeVFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, VERY THIN PROFILE, FINE PITCH
Maximum seat height0.8 mm
Maximum supply voltage (Vsup)1.95 V
Minimum supply voltage (Vsup)1.7 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
width10 mm
IS43/46LQ16256EA, IS43/46LQ16256EAL
IS43/46LQ32128EA, IS43/46LQ32128EAL
® Long-term Support
World Class Quality
4Gb (x16/x32) Mobile LPDDR4/LPDDR4X with ECC
FEATURES
• Configuration:
- 256Mb x16 x 1 channel
- 128Mb x16 x 2 channels
- 8 internal banks per channel
• On-Chip ECC:
- Single-bit error correction (per 64-bits)
• Low-voltage Core and I/O Power Supplies
VDD1 = 1.70-1.95V
VDD2 = 1.06-1.17V
VDDQ = 1.06-1.17V (LPDDR4)
VDDQ = 0.57-0.65V (LPDDR4X)
• LVSTL(Low Voltage Swing Terminated Logic) I/O
Interface
• Internal VREF and VREF Training
• Dynamic ODT :
DQ ODT :VSSQ Termination
CA ODT :VSS Termination
• Max. Clock Frequency : 1.6GHz (3.2Gbps)
• 16n Pre-fetch DDR architecture
• Single data rate (multiple cycles) command/
address bus
• Bidirectional/differential data strobe per byte of
data (DQS/DQS#)
• Programmable burst lengths (16 or 32)
• ZQ Calibration
• Operation Temperature
Industrial
(T
C
= -40°C to 95°C)
Automotive, A1 (T
C
= -40°C to 95°C)
Automotive, A2 (T
C
= -40°C to 105°C)
Automotive, A3 (T
C
= -40°C to 125°C)
PRELIMINARY INFORMATION
SEPTEMBER 2019
DESCRIPTION
The IS43/46LQ16256EA/EAL and IS43/46LQ32128EAL
are 4Gbit CMOS LPDDR4 SDRAM. The device is
organized as 1/2 channels per device, and individual
channel is 8-banks and 16-bits. This product uses a
double-data-rate architecture to achieve high-speed
operation.
The double data rate architecture is essentially a 16N
prefetch architecture with an interface designed to
transfer two data words per clock cycle at the I/O pins.
This product offers fully synchronous operations refer-
enced to both rising and falling edges of the clock.
The data paths are internally pipelined and 16n bits
prefetched to achieve very high bandwidth.
• On-chip temperature sensor whose status
can be read from MR4
200-ball x16/x32 BGA (10x14.5 mm)
ADDRESS TABLE
Parameter
# of Channel
Row Addresses
Column Addresses
Bank Addresses
1
2
R0-R13
R0-R14
C0-C9
BA0-BA2
Note:
Address information is per channel base.
KEY TIMING PARAMETERS
Speed
Grade
-062
-075
Freq.
(MHz)
1600
1333
Data
Rate
(Mb/s)
3200
2666
Write
Latency
Set
A
14
12
Set
B
26
22
Read
Latency
DBI
OFF
28
24
DBI
ON
32
28
• Clock-Stop capability
Note:
Other clock frequencies/data rates supported; please
refer to AC timing tables.
Copyright © 2019 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be ex-
pected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon
Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 0A
09/23/2019
1
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