IS45S83200G-7TLA2 datasheet, PDF

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IS45S83200G-7TLA2: Description16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54; Categorystorage; File Size947KB，63 Pages; ManufacturerISSI(Integrated Silicon Solution Inc.); Websitehttp://www.issi.com/

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IS45S83200G-7TLA2 Overview

16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54

IS45S83200G-7TLA2 Parametric

Parameter Name	Attribute value
maximum clock frequency	166 MHz
Number of functions	1
Number of terminals	54
Minimum operating temperature	0.0 Cel
Maximum operating temperature	70 Cel
Rated supply voltage	3.3 V
Minimum supply/operating voltage	3 V
Maximum supply/operating voltage	3.6 V
Processing package description	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54
state	Active
sub_category	DRAMs
Access method	FOUR BANK PAGE BURST
ccess_time_max	5.4 ns
interleaved_burst_length	1,2,4,8
i_o_type	COMMON
jesd_30_code	S-PBGA-B54
storage density	2.68E8 bit
Memory IC type	SYNCHRONOUS DRAM
Number of ports	1
Number of digits	1.68E7 words
Number of digits	16M
operating mode	SYNCHRONOUS
organize	16MX16
Output characteristics	3-STATE
Packaging Materials	PLASTIC/EPOXY
ckage_code	TFBGA
ckage_equivalence_code	BGA54,9X9,32
packaging shape	SQUARE
Package Size	GRID ARRAY, THIN PROFILE, FINE PITCH
wer_supplies__v_	3.3
qualification_status	COMMERCIAL
efresh_cycles	8192
seated_height_max	1.2 mm
sequential_burst_length	1,2,4,8,FP
standby_current_max	0.0040 Amp
Maximum supply voltage	0.1600 Amp
surface mount	YES
Craftsmanship	CMOS
Temperature level	COMMERCIAL
Terminal form	BALL
Terminal spacing	0.8000 mm
Terminal location	BOTTOM
length	8 mm
width	8 mm
dditional_feature	AUTO/SELF REFRESH

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IS42S83200G, IS42S16160G

IS45S83200G, IS45S16160G

32Meg x 8, 16Meg x16

256Mb SYNCHRONOUS DRAM

FEATURES

• Clock frequency: 200,166, 143 MHz

• Fully synchronous; all signals referenced to a

positive clock edge

• Internal bank for hiding row access/precharge

• Single Power supply: 3.3V + 0.3V

• LVTTL interface

• Programmable burst length

– (1, 2, 4, 8, full page)

• Programmable burst sequence:

Sequential/Interleave

• Auto Refresh (CBR)

• Self Refresh

• 8K refresh cycles every 32 ms (A2 grade) or

64 ms (commercial, industrial, A1 grade)

• Random column address every clock cycle

• Programmable CAS latency (2, 3 clocks)

• Burst read/write and burst read/single write

operations capability

• Burst termination by burst stop and precharge

command

DECEMBER 2013

OVERVIEW

ISSI

's 256Mb Synchronous DRAM achieves high-speed

data transfer using pipeline architecture. All inputs and

outputs signals refer to the rising edge of the clock input.

The 256Mb SDRAM is organized as follows.

IS42S83200G

54-pin TSOPII

54-ball BGA

IS42S16160G

54-pin TSOPII

54-ball BGA

8M x 8 x 4 Banks 4M x16x4 Banks

KEY TIMING PARAMETERS

Parameter

Clk Cycle Time

CAS Latency = 3

CAS Latency = 2

Clk Frequency

CAS Latency = 3

CAS Latency = 2

Access Time from Clock

CAS Latency = 3

CAS Latency = 2

-5

200

100

-6

166

100

5.4

-7

7.5

143

133

5.4

Unit

Mhz

OPTIONS

• Package:

54-pin TSOP-II

54-ball BGA

• Operating Temperature Range:

Commercial (0

C to +70

Industrial (-40

C to +85

Automotive Grade A1 (-40

C to +85

Automotive Grade A2 (-40

C to +105

ADDRESS TABLE

Parameter

Configuration

Refresh Count

32M x 8

8M x 8 x 4

banks

Com./Ind. 8K/64ms

A1 8K/64ms

A2 8K/32ms

A0-A12

A0-A9

BA0, BA1

A10/AP

16M x 16

4M x 16 x 4

banks

8K/64ms

8K/32ms

A0-A12

A0-A8

BA0, BA1

A10/AP

Row Addresses

Column Addresses

Bank Address Pins

Auto Precharge Pins

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can

reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such

applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc. — www.issi.com

Rev. F

12/9/2013

IS45S83200G-7TLA2 Related Products

	IS45S83200G-7TLA2	IS42S16160G	IS42S83200G	IS45S16160G-6BLA1	IS45S83200G	IS45S83200G-6TLA1	IS45S83200G-7BLA1	IS45S83200G-7CTLA1	IS45S83200G-7CTLA2	IS45S83200G-7TLA1
Description	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54	16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
maximum clock frequency	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of terminals	54	54	54	54	54	54	54	54	54	54
Minimum operating temperature	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel
Maximum operating temperature	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel
Rated supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Minimum supply/operating voltage	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Maximum supply/operating voltage	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Processing package description	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54	8 X 8 MM, 0.80 MMM, PITCH, LEAD FREE, TFBGA-54
state	Active	Active	Active	Active	Active	Active	Active	Active	Active	Active
sub_category	DRAMs	DRAMs	DRAMs	DRAMs	DRAMs	DRAMs	DRAMs	DRAMs	DRAMs	DRAMs
Access method	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
ccess_time_max	5.4 ns	5.4 ns	5.4 ns	5.4 ns	5.4 ns	5.4 ns	5.4 ns	5.4 ns	5.4 ns	5.4 ns
interleaved_burst_length	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8
i_o_type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
jesd_30_code	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54
storage density	2.68E8 bit	2.68E8 bit	2.68E8 bit	2.68E8 bit	2.68E8 bit	2.68E8 bit	2.68E8 bit	2.68E8 bit	2.68E8 bit	2.68E8 bit
Memory IC type	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
Number of ports	1	1	1	1	1	1	1	1	1	1
operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
organize	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Packaging Materials	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
ckage_code	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA
ckage_equivalence_code	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32
packaging shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package Size	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
wer_supplies__v_	3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3
qualification_status	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
efresh_cycles	8192	8192	8192	8192	8192	8192	8192	8192	8192	8192
seated_height_max	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
sequential_burst_length	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP
standby_current_max	0.0040 Amp	0.0040 Amp	0.0040 Amp	0.0040 Amp	0.0040 Amp	0.0040 Amp	0.0040 Amp	0.0040 Amp	0.0040 Amp	0.0040 Amp
Maximum supply voltage	0.1600 Amp	0.1600 Amp	0.1600 Amp	0.1600 Amp	0.1600 Amp	0.1600 Amp	0.1600 Amp	0.1600 Amp	0.1600 Amp	0.1600 Amp
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
Craftsmanship	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
Terminal spacing	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm	0.8000 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
length	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm
width	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm
dditional_feature	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Number of digits	16M	16M	16M	16M	16M	16M	16M	16M	16M	16M

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