ST72589BW,
ST72389BW
8-BIT MCU WITH NESTED INTERRUPTS, DOT MATRIX LCD,
ADC, TIMERS, PWM-BRM, SPI, SCI, I²C, CAN INTERFACES
DATASHEET
s
s
s
s
s
s
s
s
s
s
s
s
s
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s
s
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16K ROM or 24 Kbytes EPROM/OTP/
FASTROM
Master Reset and Power-on Reset
Low consumption resonator main oscillator
4 Power saving modes
Nested interrupt controller
NMI dedicated non maskable interrupt pin
31 multifunctional bidirectional I/O lines with:
– external interrupt capability (5 vectors)
– 21 alternate function lines
LCD driver with 60 segment outputs and 8
backplane outputs able to drive up to 60x8 (480)
or 60x4 (240) LCD displays
Real time base, Beep and Clock-out capabilities
Software watchdog reset
Two 16-bit timers with:
– 2 input captures
– 2 output compares
– external clock input on one timer
– PWM and Pulse generator modes
10-bit PWM (DAC) with 4 dedicated output pins
SPI synchronous serial interface
SCI asynchronous serial interface
I2C multi master / slave interface
CAN interface
8-bit ADC with 5 dedicated input pins
PQFP128
14 x 20
s
s
s
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8-bit Data Manipulation
63 Basic Instructions
17 main Addressing Modes
8 x 8 Unsigned Multiply Instruction
True Bit Manipulation
Full hardware/software development package
s
Device Summary
Features
Program memory - bytes
RAM (stack) - bytes
Std. Peripherals
Operating Supply
CPU Frequency
Temperature Range
Packages
Development device
ST72589BW5
24K OTP/FASTROM
1024 (256)
LCD 60x8, Watchdog,
16-bit Timers, PWM-BRM,
SPI, SCI, I2C, CAN, ADC
ST72389BW4
16K ROM
512 (256)
LCD 60x8, Watchdog,
16-bit Timers,
SPI, SCI, ADC
4.5V to 5.5V
4 to 8 MHz (with 8 to 16 MHz oscillator)
-40°C to +85°C
PQFP128
ST72E589BW5
Rev. 2.7
June 2003
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Table of Contents
1 GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 REGISTER & MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.4 MEMORIES AND PROGRAMMING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3 CPU REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 SUPPLY, RESET AND CLOCK MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 RESET MANAGER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 7
3.2 LOW CONSUMPTION OSCILLATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3 MAIN CLOCK CONTROLLER (MCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4 INTERRUPTS & POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.2 POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.2 FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.3 I/O PORT IMPLEMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6 MISCELLANEOUS REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.1 I/O PORT INTERRUPT SENSITIVITY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.2 I/O PORT ALTERNATE FUNCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.3 MISCELLANEOUS REGISTERS DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7 ON-CHIP PERIPHERALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.1 LCD DRIVER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.2 WATCHDOG TIMER (WDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.3 16-BIT TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.4 PWM/BRM GENERATOR (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
7.5 SERIAL PERIPHERAL INTERFACE (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
7.6 SERIAL COMMUNICATIONS INTERFACE (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
7.7 I2C BUS INTERFACE (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
7.8 CONTROLLER AREA NETWORK (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
7.9 8-BIT A/D CONVERTER (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
8 INSTRUCTION SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
8.1 CPU ADDRESSING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
8.2 INSTRUCTION GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
9 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
9.1 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
9.2 RECOMMENDED OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
158
9.3 TIMING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
9.4 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
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Table of Contents
9.5 I/O PORTS CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
9.6 SUPPLY, RESET AND CLOCK CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . 143
9.7 MEMORY AND PERIPHERAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
10 PACKAGE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
10.1 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
11 DEVICE CONFIGURATION AND ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . 154
11.1 ORDERING INFORMATION AND TRANSFER OF CUSTOMER CODE . . . . . . . . . . . . 154
11.2 ST7 APPLICATION NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
12 SUMMARY OF CHANGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
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ST72589BW, ST72389BW
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST72589W and ST72389W Microcontroller
Units are members of the ST7 family of Microcon-
trollers dedicated to high-end applications with
LCD driver capability.
These devices are based on an industry-standard
8-bit core and feature an enhanced instruction set.
Under software control, these microcontrollers
may be placed in either WAIT, SLOW, ACTIVE-
Figure 1. Device Block Diagram
HALT or HALT modes, thus reducing power con-
sumption.
The enhanced instruction set and addressing
modes afford real programming potential. In addi-
tion to standard 8-bit data management, these mi-
crocontrollers feature true bit manipulation, 8x8
unsigned multiplication and indirect addressing
modes.
V
DD
V
SS
RESET
NMI
POWER
SUPPLY
EPROM
24K
CONTROL
8-BIT CORE
ALU
RAM
512 or 1K
PORT B
OSC2
OSC1
MAIN OSC
ADDRESS AND DATA BUS
TIMER B
CAN*
PORT D
SPI
I2C*
PB0 -> PB6
(7-bit)
PORT C
SCI
PC0 -> PC7
(8-bit)
BEEP
TIMER A
PA0 -> PA7
(8-bit)
PORT A
WATCHDOG
PWM0 -> PWM3
(4-bit)
AIN0 -> AIN4
(5-channel)
V
DDA
V
SSA
PWM-BRM*
8-bit ADC
PD0 -> PD7
(8-bit)
LCD DRIVER
+
LCD RAM (60x8)
S1 -> S60
(60-segment)
COM1 -> COM8
(60-common)
VLCD, VLCD3/4,
VLCD1/2, VLCD1/4
GLCD
*available on ST72589 version only
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ST72589BW, ST72389BW
1.2 PIN DESCRIPTION
Figure 2. 128-Pin PQFP Package Pinout
S44
S43
S42
S41
S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
S45
S46
S47
S48
S49
S50
S51
S52
S53
S54
S55
S56
S57
S58
S59
S60
G
LCD
V
LCD1/4
V
LCD1/2
V
LCD3/4
V
LCD
V
DD_A
AIN0
AIN1
AIN2
AIN3
AIN4
V
SS_A
PWM0*
PWM1*
PWM2*
PWM3*
RESET
VPP
V
DD_1
OSC1
OSC2
V
SS_1
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
S18
S17
S16
S15
S14
S13
S12
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
V
DD_3
V
SS
V
SS
V
SS_3
PD7
PD6
PD5
PD4
PD3
PD2
/ SDAI*
/ SCLI*
/ SS
/ SCK
EI5
EI5
EI1
39
40
41
EI2
EI3
EI4
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PD1 / MOSI
PD0 / MISO
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
NMI
OCMP1_B / PB0
OCMP2_B / PB1
ICAP1_B / PB2
ICAP2_B / PB3
PB4
CAN_RX* / PB5
CAN_RX */ PB6
V
DD_2
V
SS_2
TDO / PC0
RDI / PC1
ICAP1_A / PC2
ICAP2_A / PC3
OCMP1_A / PC4
OCMP2_A / PC5
CLK_A / PC6
MCO / BEEP / PC7
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