2200CGG1001234A datasheet, PDF

2200CGG1001234A: DescriptionStrain Guage Sensor, Gage, 0Psi Min, 100Psi Max, 0.25%, 1-6V, Cylindrical; CategoryThe sensor Sensor/transducer; File Size507KB，4 Pages; ManufacturerGems Sensors & Controls

Download Datasheet Parametric View All

2200CGG1001234A Overview

Strain Guage Sensor, Gage, 0Psi Min, 100Psi Max, 0.25%, 1-6V, Cylindrical

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Reach Compliance Code	unknow
Maximum accuracy(%)	0.25%
shell	STAINLESS STEEL
Nominal offset	1V
Maximum operating temperature	80 °C
Minimum operating temperature	-20 °C
Output range	1-6V
Output type	ANALOG VOLTAGE
Package Shape/Form	CYLINDRICAL
port type	G1/4 MALE
Maximum pressure range	100 Psi
Minimum pressure range
Pressure sensing mode	GAGE
Sensor/Transducer Type	PRESSURE SENSOR,STRAIN GUAGE
Maximum supply voltage	35 V
Minimum supply voltage	1.5 V
Termination type	PLASTIC CABLE GLAND
Base Number Matches	1

【TI Classic】Basic knowledge of switching power supply (TI training e-book): [align=left][font=黑体][size=5]Dear friends, it's Monday again, and I'm here to report to you~~~ Today I'm sending you a classic e-book of TI training! [/size][/font]:victory:[font=黑体][size=5]! [/size][...; 德州仪器 Analogue and Mixed Signal

Can someone please help me check my AD7705 program?: Hello everyone, I use AD7705 to do analog-to-digital conversion, but there is a problem with the program. Can you help me find out? The high bit of the converted data is always 1. Please help me! ! ! ...; moutainyang MCU

I'm begging for help from experts on how to implement the FFT IP core system in Simulink environment!: [align=left][size=5][/align] Dear experts, my task now is to load Altera's DSP Builder library file in Matlab/Simulink environment and test FFT IP_Core. After many days of hard work, the result is sti...; hailuo2012 FPGA/CPLD

[C/C++] [Efficient C language] (V) - Some habits for efficient portable programming: For some state sets, use enum instead of #define as much as possible. For example: enum {OFF = 0, ON = 1}; is much better than #define OFF 0 #define ON 1. The two ways of writing have the same compila...; 小煜 Programming Basics

Proteus classic example: Proteus classic example software level: ★★★Cadence IC design (all FPGA-CPLD development concise teaching vhdl language routine collection. PROTEL DXP training materials proteldxp entry and improvement...; fighting RF/Wirelessly

Top secret information about signals~!!! ! ! ! Come in quickly~: [i=s] This post was last edited by paulhyde on 2014-9-15 04:16 [/i] This software is very useful. It contains all the Chinese and English information about chips you need. Download it now. Don’t miss ...; zhangqiming Electronics Design Contest

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components