K
KAWASAKI
LSI
KCUSB3
USB Controller – Quick Interface
General Description
The Kawasaki KCUSB3 Controller is a quick single chip solution to interface peripheral devices to the
Universal Serial Bus (USB). The KCUSB3 has been specifically designed to provide a simple and fast
method of designing interfaces for peripheral devices to the USB port. This has been accomplished by its
highly integrated functionality and flexible General Purpose I/O (GPIO) that can be configured to your
system requirements. This device has been configured with a wide range of capabilities for your
immediate use or evaluation. The device can then be reconfigured for your specific application. You can
directly access the embedded processor’s address and data lines to use external programmable logic for
evaluation before configuring the GPIO for your final device. The SIE (Serial Interface Engine) is fully
compatible with the USB specification.
Features
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Advanced 16 Bit processor for USB transaction
processing and control data processing
USB interface ver 1.0/1.1 compliant
Transceivers and SIE (Serial Interface Engine)
Internal Clock Generation
Utilizes low cost external crystal circuitry
1.5K x 16 Internal RAM buffer
2 IRQ
8 Channel, 10 Bit A/D
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External Memory Interface for direct
access to the 16-bit processor for using
external logic or memory.
General purpose I/O
Watchdog timer
PWM Output Support
8K user programmable gates
8K bytes ROM
I
2
C Interface
100 pin QFP package
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Block Diagram (Application Example)
8
AIN
8 Channel
10 Bit A/D
4 PWM Out
(GPIO)
Timer 0
Timer 1
16 Bit
Processor
Watchdog
Timer
External Memory
Interface
A15-0
D15-0
Cntrl.
PWM
4
16 Bit Address / Data Bus
Txd
Rxd
UART
RAM
(3KB)
Serial
Interface
Engine
PLL & Clock
Generator
X1
X2
CK
DIO
I
2
C
2
INT1-0
2 IRQ
Mask ROM
(8KB)
USB Interface
Data -
Data +
Kawasaki LSI
•
2570 North First Street
•
Suite 301
•
San Jose, CA 95131
•
Tel: (408) 570-0555
•
Fax: (408) 570-0567
•
www.klsi.com
Ver. 1.3
1
K
KAWASAKI
LSI
KCUSB3
USB Controller – Quick Interface
Description
External Data Pins
External Data Pins
GND
External Data Pins
External Data Pins
GND
External Data Pins
Programmable
I/O Mode *
Pin
I/O
Pin Name
Number
94
IN/OUT
XD_10
95
IN/OUT
XD_11
96
IN
IGND
97
IN/OUT
XD_12
98
IN/OUT
XD_13
99
IN
OGND
100
IN/OUT
XD_14
* Dedicated GPIO’s are not selected.
Function Description
16 Bit Processor
The integrated 16 bit processor serves as a micro controller for USB peripherals. The processor
can execute approximately five million instructions per second. With this processing power it
allows the design of intelligent peripherals that can process data prior to passing it on to the host
PC, thus improving overall performance of the system. The masked ROM (4K X 16) in the
KCUSB3 or external memory contains a specialized instruction set that has been designed for
highly efficient coding of processing algorithms and USB transaction processing.
The 16-bit processor is designed for efficient data execution by having direct access to the RAM
Buffer, external memory, I/O interfaces, and all the control and status registers. The
divide/multiply feature expands the capability of USB peripherals.
The processor contains sixteen general-purpose registers along with several special purpose
registers including a flag register and an interrupt enable register. Eight of these registers can be
used for indirect Addressing, with optional indexed and auto increment modes available. One of
these general-purpose registers is additionally used as a stack pointer. The register set is
mapped into RAM, and can be easily relocated for fast context switching.
The processor supports prioritized vectored hardware interrupts. In addition, as many as 240
software interrupt vectors are available.
The processor provides six addressing modes, supporting memory-to-memory, memory-to-
register, register-to-register, immediate-to-register or immediate-to-memory operations. Register,
direct, immediate, indirect, and indirect indexed addressing modes are supported. In addition,
there is an auto-increment mode in which a register, used as an address pointer is automatically
incremented after each use, making repetitive operations more efficient both from a programming
and a performance standpoint.
The processor features a full set of program control, logical, and integer arithmetic instructions.
All instructions are sixteen bits wide, although some instructions require operands, which may
occupy another one or two words. Several special “ short immediate” instructions are available,
so that certain frequently used operations with small constant operand will fit into a 16-bit
instruction.
Kawasaki LSI
•
2570 North First Street
•
Suite 301
•
San Jose, CA 95131
•
Tel: (408) 570-0555
•
Fax: (408) 570-0567
•
www.klsi.com
Ver. 1.3
5
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