LPC11U37HFBD64401 datasheet, PDF

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LPC11U37HFBD64401: Description32-bit ARM Cortex-M0 microcontroller up to 128 kB flash up to 12 kB SRAM and 4 kB EEPROM USB device USART; File Size2MB，76 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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LPC11U37HFBD64401 Overview

32-bit ARM Cortex-M0 microcontroller up to 128 kB flash up to 12 kB SRAM and 4 kB EEPROM USB device USART

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LPC11U3x

32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash; up

to 12 kB SRAM and 4 kB EEPROM; USB device; USART

Rev. 2 — 25 November 2013

Product data sheet

1. General description

The LPC11U3x are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for

8/16-bit microcontroller applications, offering performance, low power, simple instruction

set and memory addressing together with reduced code size compared to existing 8/16-bit

architectures.

The LPC11U3x operate at CPU frequencies of up to 50 MHz.

Equipped with a highly flexible and configurable full-speed USB 2.0 device controller, the

LPC11U3x brings unparalleled design flexibility and seamless integration to today’s

demanding connectivity solutions.

The peripheral complement of the LPC11U3x includes up to 128 kB of flash memory, up

to 12 kB of SRAM data memory and 4 kB EEPROM, one Fast-mode Plus I

C-bus

interface, one RS-485/EIA-485 USART with support for synchronous mode and smart

card interface, two SSP interfaces, four general purpose counter/timers, a 10-bit ADC,

and up to 54 general purpose I/O pins.

The I/O Handler is a software library-supported hardware engine that can be used to add

performance, connectivity and flexibility to system designs. It is available on the

LPC11U37HFBD64/401. The I/O Handler can emulate serial interfaces such as UART,

C, and I

S with no or very low additional CPU load and can off-load the CPU by

performing processing-intensive functions like DMA transfers in hardware. Software

libraries for multiple I/O Handler applications are available on

http://www.LPCware.com.

2. Features and benefits



System:



ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.



ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).



Non-Maskable Interrupt (NMI) input selectable from several input sources.



System tick timer.



Memory:



Up to 128 kB on-chip flash program memory with sector (4 kB) and page erase

(256 byte) access.



4 kB on-chip EEPROM data memory; byte erasable and byte programmable;

on-chip API support.



Up to 12 kB SRAM data memory.



16 kB boot ROM.

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