EEWORLDEEWORLDEEWORLD

Part Number

Search

C1812X7R160-823KN6E

Description
Ceramic Capacitor, Multilayer, Ceramic, 16V, 10% +Tol, 10% -Tol, X7R, 15% TC, 0.082uF, Surface Mount, 1812, CHIP, ROHS COMPLIANT
CategoryPassive components    capacitor   
File Size1023KB,14 Pages
ManufacturerVENKEL LTD
Environmental Compliance  
Download Datasheet Parametric View All

C1812X7R160-823KN6E Overview

Ceramic Capacitor, Multilayer, Ceramic, 16V, 10% +Tol, 10% -Tol, X7R, 15% TC, 0.082uF, Surface Mount, 1812, CHIP, ROHS COMPLIANT

C1812X7R160-823KN6E Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerVENKEL LTD
package instruction, 1812
Reach Compliance Codecompliant
ECCN codeEAR99
capacitance0.082 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
high2.159 mm
JESD-609 codee3
length4.496 mm
Manufacturer's serial numberC1812
Installation featuresSURFACE MOUNT
multi-layerYes
negative tolerance10%
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package shapeRECTANGULAR PACKAGE
Package formSMT
method of packingTR, EMBOSSED, 7 INCH
positive tolerance10%
Rated (DC) voltage (URdc)16 V
seriesC
size code1812
surface mountYES
Temperature characteristic codeX7R
Temperature Coefficient15% ppm/°C
Terminal surfaceMatte Tin (Sn) - with Nickel (Ni) barrier
Terminal shapeWRAPAROUND
width3.2 mm
Ceramic Chip Capacitors
Multilayer chip capacitors have a low residual inductance, an excellent frequency
response and minimal stray capacitance since there are no leads. These characteristics
enable design to be very close to the theoretical values of the capacitors.
NP0/C0g:
15%
10%
5%
0%
-5%
-10%
-15%
-55°C
-25°C
0°C
SPECIFICATIONS:
Typical Capacitance Change vs. Temperature
OPERATING TEMPERATURE RANGE:
TEMPERATURE COEFFICIENT:
TEMPERATURE VOLTAGE COEFFICIENT:
DISSIPATION FACTOR:
INSULATION RESISTANCE:
AGEING:
WITHSTANDING VOLTAGE:
TEST PARAMETERS:
25°C
50°C
75°C
100°C
125°C
CAPACITANCE TOLERANCE:
OPERATING TEMPERATURE RANGE:
TEMPERATURE COEFFICIENT:
TEMPERATURE VOLTAGE COEFFICIENT:
DISSIPATION FACTOR:
-55°C to +125°C
0 ±30PPM/°C
0 ±30PPM/°C
0.1% MAX.
>1000 ohms F or 100 G ohms, whichever is less at 25°C, VDCW.
(The IR at 125°C is 10% of the value at 25°C)
None
>2.5 times VDCW
1MHz ± 100KHz at 1.0 ± 0.2 Vrms
100 pF, 25°C
1KHz ± 100Hz at 1.0 ± 0.2 Vrms > 100 pF, 25°C
B,C,D,F,G,J,K
-55°C to +125°C
0 ±15%∆°C MAX.
X7R not applicable
For 50 volts and 100 volts: 2.5% MAX.;
For 25 Volts 3.5 %( 0201, 0402, 0603, sizes
If 7% Max, for Values
0.33uF) for 16 Volts: 3.5% Max (except 0402
0.33uF & 0603
0.15uF DF is 5% Max)
For 10 Volts: 5% Max
For 6.3 Volts: 10% Max
For Values
10uF For all voltage offerings, the DF is 10% Max
>1000 ohms F or 100 G ohms, whichever is less at 25°C, VDCW.
(The IR at 125°C is 10% of the value at 25°C)
2.5% per decade hour, typical
>2.5 times VDCW
1KHz ± 100Hz at 1.0 ± 0.2 Vrms > 100 pF, 25°C
J,K,M
-55°C to +85°C
0 ±15%∆°C MAX.
X5R not applicable
For 50 Volts and 100 Volts 2.5% Max
For 25 Volts: 3.5% Max (0201, 0402, 0603,
0.33uF DF is 7% Max)
For 16 Volts: 3.5% Max (except 0402
0.33uF & 0603
0.15uF DF is
5% Max)
For 10 Volts 5.0% Max; For 4.0 Volts and 6.3Volts: 10% Max
For values
10uF the D.F. is 10% Max.
>1000 ohms F or 100 G ohms, whichever is less
at 25°C, VDCW. (10,000 ohms at 125°C)
2.5% per decade hour, typical
>2.5 times VDCW
1KHZ ± 100Hz at 1.0 ± 0.2 Vrms > 100 pF, 25°C
K,M
+10°C to +85°C
+22% - 56%∆°C MAX.
4.0% MAX.
>100 ohms F or 10 G ohms, whichever is less at 25°C, VDCW.
5% per decade hour, typical
>2.5 times VDCW
1KHz ± 100Hz at 0.5 ± 0.1 Vrms, 25°C
M,Z
-30°C to +85°C
+22% - 82%∆°C MAX.
For 25 volts and 50 volts: 5% MAX.;
For 16 volts: 7% MAX.; For 10 volts: 9% MAX.;
For 6.3 volts: 11% MAX.
For higher Cap values > 10µF, the D.F. is 20% MAX.
>100 ohms F or 10 G ohms, whichever is less at 25°C, VDCW.
7% per decade hour, typical
>2.5 times VDCW
1KHz ± 100Hz at 1.0 ± 0.2 Vrms, 25°C
M,Z
X7R:
15%
10%
5%
0%
-5%
-10%
-15%
-55°C
-25°C
0°C
SPECIFICATIONS:
Typical Capacitance Change vs. Temperature
INSULATION RESISTANCE:
25°C
50°C
75°C
100°C
125°C
AGEING:
WITHSTANDING VOLTAGE:
TEST PARAMETERS:
*
CAPACITANCE TOLERANCE:
OPERATING TEMPERATURE RANGE:
TEMPERATURE COEFFICIENT:
TEMPERATURE VOLTAGE COEFFICIENT:
DISSIPATION FACTOR:
X5R:
15%
10%
5%
0%
-5%
-10%
-15%
-55°C
-25°C
0°C
SPECIFICATIONS:
Typical Capacitance Change vs. Temperature
INSULATION RESISTANCE:
25°C
50°C
75°C
100°C
125°C
Z5U:
20%
0%
-20%
-40%
-60%
-80%
AGEING:
WITHSTANDING VOLTAGE:
TEST PARAMETERS:
*
CAPACITANCE TOLERANCE:
OPERATING TEMPERATURE RANGE:
TEMPERATURE COEFFICIENT:
DISSIPATION FACTOR:
INSULATION RESISTANCE:
AGEING:
WITHSTANDING VOLTAGE:
TEST PARAMETERS:
CAPACITANCE TOLERANCE:
OPERATING TEMPERATURE RANGE:
TEMPERATURE COEFFICIENT:
DISSIPATION FACTOR:
SPECIFICATIONS:
Typical Capacitance Change vs. Temperature
-55°C
-25°C
0°C
25°C
50°C
75°C
100°C
125°C
Y5V:
40%
20%
0%
-20%
-40%
-60%
-80%
-100%
-55°C
-25°C
0°C
SPECIFICATIONS:
Typical Capacitance Change vs. Temperature
25°C
50°C
75°C
100°C
125°C
INSULATION RESISTANCE:
AGEING:
WITHSTANDING VOLTAGE:
TEST PARAMETERS:
*
CAPACITANCE TOLERANCE:
5
1KHz ± 100Hz at 1.0 ± 0.2 Vrms
<
10uF (10 V min.)
1KHz ± 100Hz at 0.5 ± 0.1 Vrms
<
10uF (6.3V max.)
120Hz ± 24Hz at 0.5 ± 0.1 Vrms
10uF
All components in this section are RoHS compliant per the EU directives and definitions.
*
Test parameters for High Value Caps - X7R, X5R and Y5V:
Can I directly control the high and low states of the two data lines of the USB port?
I don't work in this field. I want to know more about it and then learn about it. Thank you....
dszhang88 Embedded System
I want to design a PDA (slightly larger than a mobile phone) and need help with component selection
I used to make it palm-sized, but now I want to reduce it to the size of a mobile phone, so I want to use BGA packaging as much as possible. What do you recommend? 1. SDRAM 128M byte, BGA packaging, w...
masermm Embedded System
Technical sharing from a senior electronic engineer: Grounding methods
Grounding is the most basic content in circuit design , but almost no one can explain it clearly. In almost every training and communication, someone will ask, "Teacher, is there a universal grounding...
decho0821 PCB Design
New Discovery Using Internal Oscillator Clock
New Discovery Using Internal Oscillator ClockRecently, I saw an article online titled "Making life without crystal oscillators possible - UFM.[CPLD]". When using the EPM241T100C5 in the MAX II chipset...
tdyizhen1314 FPGA/CPLD
launch address in nk.bin
How is the launch address in nk.bin determined? Is it the entry address of nk's startup.s during compilation? Or something else? Thanks...
lichangjd Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 752  958  1161  2375  619  16  20  24  48  13 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号