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2N1777ALEADFREE

Description
Silicon Controlled Rectifier, 8A I(T)RMS, 400V V(RRM), 1 Element, TO-64,
CategoryAnalog mixed-signal IC    Trigger device   
File Size416KB,2 Pages
ManufacturerCentral Semiconductor
Download Datasheet Parametric Compare View All

2N1777ALEADFREE Overview

Silicon Controlled Rectifier, 8A I(T)RMS, 400V V(RRM), 1 Element, TO-64,

2N1777ALEADFREE Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
package instructionPOST/STUD MOUNT, O-MUPM-D2
Reach Compliance Codecompli
ECCN codeEAR99
Shell connectionANODE
ConfigurationSINGLE
Maximum DC gate trigger current15 mA
JEDEC-95 codeTO-64
JESD-30 codeO-MUPM-D2
JESD-609 codee3
Number of components1
Number of terminals2
Package body materialMETAL
Package shapeROUND
Package formPOST/STUD MOUNT
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum rms on-state current8 A
Repeated peak reverse voltage400 V
surface mountNO
Terminal surfaceMATTE TIN
Terminal formSOLDER LUG
Terminal locationUPPER
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger device typeSCR
Base Number Matches1
2N1772A
2N1774A
2N1776A
2N1777A
SILICON CONTROLLED RECTIFIER
8 AMP, 100 THRU 400 VOLTS
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR 2N1772A Series
types are reverse blocking triode thyristors, designed
for use in low power switching and phase control
applications requiring blocking voltages up to 400 volts,
and RMS load currents up to 8 amps.
MARKING: FULL PART NUMBER
TO-64 CASE
MAXIMUM RATINGS:
(TC=25°C unless otherwise noted)
SYMBOL
Peak Repetitive Off-State Voltage
VDRM, VRRM
Peak Non-Repetitive Off-State Voltage
VDRM, VRRM
Peak Forward Voltage
Peak Gate Voltage
RMS On-State Current
Average On-State Current (TC=105°C)
Peak Forward Gate Current
Peak Forward Surge Current
I
2
t
Value for Fusing, tp=8.3ms
Peak Gate Power Dissipation
Average Gate Power Dissipation
Operating and Storage Junction Temperature
Thermal Resistance
VFM
VGFM, VGRM
IT(RMS)
IO
IGFM
IFSM
I
2
t
PGM
PG(AV)
TJ, Tstg
2N1772A 2N1774A
100
200
150
300
2N1776A 2N1777A UNITS
300
400
V
400
500
V
V
V
A
A
A
A
A
2
s
W
W
°C
°C/W
480
10
8.0
4.7
2.0
60
15
5.0
0.5
–40 to +150
3.1
Θ
JC
ELECTRICAL CHARACTERISTICS:
(TC=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
IDRM, IRRM
VDRM, VRRM=100V
IDRM, IRRM
VDRM, VRRM=200V
IDRM, IRRM
VDRM, VRRM=300V
IDRM, IRRM
IGT
VGT
VTM
IH
VDRM, VRRM=400V
VAK=12V, RL=250Ω
VAK=12V, RL=250Ω
IT=15A
IT=100mA
MAX
9.0
6.0
4.0
2.0
15
2.0
1.85
25
UNITS
mA
mA
mA
mA
mA
V
V
mA
R1 (16-March 2011)

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Description Silicon Controlled Rectifier, 8A I(T)RMS, 400V V(RRM), 1 Element, TO-64, Silicon Controlled Rectifier, 8A I(T)RMS, 100V V(RRM), 1 Element, TO-64, Silicon Controlled Rectifier, 8A I(T)RMS, 200V V(RRM), 1 Element, TO-64, Silicon Controlled Rectifier, 8A I(T)RMS, 300V V(RRM), 1 Element, TO-64,
Is it lead-free? Lead free Lead free Lead free Lead free
Reach Compliance Code compli compli compli compli
ECCN code EAR99 EAR99 EAR99 EAR99
Shell connection ANODE ANODE ANODE ANODE
Configuration SINGLE SINGLE SINGLE SINGLE
Maximum DC gate trigger current 15 mA 15 mA 15 mA 15 mA
JEDEC-95 code TO-64 TO-64 TO-64 TO-64
JESD-30 code O-MUPM-D2 O-MUPM-D2 O-MUPM-D2 O-MUPM-D2
JESD-609 code e3 e3 e3 e3
Number of components 1 1 1 1
Number of terminals 2 2 2 2
Package body material METAL METAL METAL METAL
Package shape ROUND ROUND ROUND ROUND
Package form POST/STUD MOUNT POST/STUD MOUNT POST/STUD MOUNT POST/STUD MOUNT
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum rms on-state current 8 A 8 A 8 A 8 A
Repeated peak reverse voltage 400 V 100 V 200 V 300 V
surface mount NO NO NO NO
Terminal surface MATTE TIN MATTE TIN MATTE TIN MATTE TIN
Terminal form SOLDER LUG SOLDER LUG SOLDER LUG SOLDER LUG
Terminal location UPPER UPPER UPPER UPPER
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Trigger device type SCR SCR SCR SCR
Base Number Matches 1 1 1 1
package instruction POST/STUD MOUNT, O-MUPM-D2 POST/STUD MOUNT, O-MUPM-D2 POST/STUD MOUNT, O-MUPM-D2 -
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