EEWORLDEEWORLDEEWORLD

Part Number

Search

O0.75-JO22-G-2.5-1-T1

Description
CMOS Output Clock Oscillator, 0.75MHz Nom, METAL CERAMIC, ULTRA FLAT, SMD, 4 PIN
CategoryPassive components    oscillator   
File Size161KB,2 Pages
ManufacturerJauch
Websitehttp://www.jauchusa.com/
Download Datasheet Parametric View All

O0.75-JO22-G-2.5-1-T1 Overview

CMOS Output Clock Oscillator, 0.75MHz Nom, METAL CERAMIC, ULTRA FLAT, SMD, 4 PIN

O0.75-JO22-G-2.5-1-T1 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerJauch
package instructionMETAL CERAMIC, ULTRA FLAT, SMD, 4 PIN
Reach Compliance Codecompliant
Other featuresSTAND-BY; ENABLE/DISABLE FUNCTION; TAPE AND REEL; BULK
maximum descent time5 ns
Frequency Adjustment - MechanicalNO
frequency stability30%
Installation featuresSURFACE MOUNT
Nominal operating frequency0.75 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS
Output load15 pF
physical size2.5mm x 2.0mm x 0.8mm
longest rise time5 ns
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Oscillator · JO22 · 2.5 V
SMD Oscillator with Stop Function · 2.5 x 2.0 mm
actual size
low current consumption
low phase noise type for WLAN available**
reflow soldering temperature: 260 °C max.
ultra flat ceramic / metal package
2002/95/EC
RoHS compliant
Pb free: pins / pads
RoHS
General Data
type
frequency range
frequency stability over all*
JO22 2.5 V
0.75 ~ 50.0 MHz
± 25 ppm ~ ± 100 ppm
see table 1
current consumption
supply voltage V
DC
temperature
operating
storage
output
see table 2
2.5 V ± 5%
-20 °C ~ +70 °C up to -40 °C ~ +105 °C
-55 °C ~ +105 °C
Table 1: Frequency Stability Code
stability code
A
± 100 ppm
-20 °C ~ +70 °C
-40 °C ~ +85 °C
-40 °C ~ +105 °C
O
O
B
± 50 ppm
O
O
O
Δ
excludes aging
G
± 30 ppm
O
O
C
± 25 ppm
Δ
standard
O
available
* includes stability at 25 °C, operating temp. range, supply voltage change, shock and vibration, aging 1st year.
rise & fall time see table 3
load max
current max.
15 pF
4 mA
Table 2: Current Consumption max.
2.5 V: current at 15pF load:
0.75 ~ 19.9 MHz
20.00 ~ 39.9 MHz
40.00 ~ 50.0 MHz
5 mA
6 mA
7 mA
low level max. 0.4 V
high level min. V
DC
- 0.4 V
output enable time max.
output disable time max.
start-up time max.
standby function
standby current max.
10 ms
50 µs
10 ms
stop
10 µA
Table 3: Rise & Fall Time max.
5 ns: 0.75 ~ 50.0 MHz
note:
- specific data on request
- rise time: 0.1 V
DC
~ 0.9 V
DC
- fall time: 0.9 V
DC
~ 0.1 V
DC
phase jitter 12 kHz ~ 20.0 MHz < 1.0 ps RMS**
symmetry at 0.5 x V
DC
45 % ~ 55 % max.
** detailed data and available frequencies for option - LP upon request
Dimensions
2.5
±0.1
0.80
±0.1
#4
#3
2.0
±0.1
#3
0.95
±0.05
#4
0.65
±0.05
0.90
±0.1
pin connection
# 1: e/d
# 2: ground
# 3: output
# 4: V
DC
in mm
1.45
±0.1
0.68
±0.05
#1
#2
0.4
#2
0.78
#1
±0.05
1.85
±0.1
top view
side view
bottom view
pad layout
Order Information
O
Oscillator
frequency
type
frequency stability
code
see table 1
supply voltage
code
2.5 = 2.5 V
output load
code
1 = 15 pF
blank =
T1 =
T2 =
LP =
0.80
±0.1
option
0.75 ~ 50.0 MHz
JO22
-20 °C~ +70 °C
-40 °C ~ +85 °C
-40 °C ~ +105 °C
low phase noise**
Example: O 20.0-JO22-B-2.5-1-LF
(LF = RoHS compliant / Pb free pins or pads)
Jauch Quartz GmbH
e-mail: info@jauch.de
full data can be found under: www.jauch.de / www.jauch.co.uk / www.jauch.fr / www.jauchusa.com
All specifications are subject to change without notice
251111-18
There is a problem with the emulator, please help me
HARD WARE CHECK can find the chipBut JTAG cannot write program into it. When I write, it says ERRO ERASING INF MEMORY.Please help. I am so anxious. The project is about to be completed!...
xiaodage Microcontroller MCU
How to improve the registry access read and write permissions in the driver?
How to improve the registry access read and write permissions in the driver? Thank you...
anuana Embedded System
Contribution to power management information in FPGA design!
Contribution of power management information in FPGA design, everyone is welcome to download and use!...
eeleader FPGA/CPLD
Merry Christmas brothers
Well done, Merry Christmas brothers Well done, Merry Christmas brothers Well done, Merry Christmas brothers Well done, Merry Christmas brothers [url=http://www.alimama.com/membersvc/zone/1280037.htm][...
dagelou Talking
High power wide voltage input regulated power supply help
I want to make a power supply with 3V to 15V input and 8V 15A output. Is there any way to do it? Can you recommend a chip?...
minnuli Power technology
Haha, I wish everyone a happy Mid-Autumn Festival! ~
Haha, I wish everyone a happy Mid-Autumn Festival! ~ This year's mooncakes made my teeth hurt! ~:lol...
wanghongyang Talking

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1674  2609  1721  958  2704  34  53  35  20  55 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号