P-Channel JFET
CORPORATION
J270 – J271 / SST270 – SST271
FEATURES
DESCRIPTION
The J270/SST270 Series is an all-purpose amplifier for
designs requiring P-channel operation. These devices feature
high gain, low noise and tight V
GS(OFF)
limits for simple circuit
design. They are available in low-cost SOT-23 and TO-92
packages and are fully compatible with automatic insertion
techniques.
ORDERING INFORMATION
Part
J270-271
SST270-271
Package
Plastic TO-92
Plastic SOT-23
Temperature Range
-55
o
C to +135
o
C
-55
o
C to +135
o
C
•
Surface Mount
•
P-Channel Amplifier
APPLICATIONS
PIN CONFIGURATION
SOT-23
TO - 92
S
D G
2
1 GATE
2 SOURCE
3 D RA IN
1
3
1 D RA IN
2 GATE
3 SOURCE
3
2
1
TOP VIEW
BOTTOM VIEW
PRODUCT MARKING (SOT-23)
SST270
P20
P21
5508
SST271
J270 – J271 / SST270 – SST271
CORPORATION
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25
o
C unless otherwise noted)
PARAMETERS/TEST CONDITIONS
Gate-Drain Voltage
Gate-Source Voltage
Gate Current
Power Dissipation
Power Derating
Operating Junction Temperature
Storage Temperature
Lead Temperature (1/16" from case for 10 seconds)
SYMBOL
V
GD
V
GS
I
G
P
D
T
J
T
stg
T
L
LIMIT
30
30
-50
350
2.8
-55 to 150
-55 to 150
300
UNIT
V
V
mA
mW
mW/
o
C
o
C
o
C
o
C
ELECTRICAL CHARACTERISTICS
(T
A
= 25
o
C unless otherwise noted)
SYMBOL
STATIC
V
(BR)GSS
V
GS(OFF
)
I
DSS
I
GSS
I
G
V
GS(F)
DYNAMIC
g
fs
g
os
C
iss
C
rss
Common-Source Forward
Transconductance
Common-Source Output
Conductance
Common-Source Input Capacitance
Common-Source Reverse
Transfer Capacitance
Equivalent Input Noise Voltage
20
pF
4
nV
Hz
√
V
DS
= -15V, V
GS
= 0V
f = 1MHz
6
15
200
8
18
500
mS
V
DS
= -15V, V
GS
= 0V
f = 1kHz
µS
Gate-Source Breakdown Voltage
Gate-Source Cutoff Voltage
Saturation Drain Current
2
10
Gate Reverse Current
5
Gate Operating Current
Gate-Source Forward Voltage
10
-0.7
nA
pA
V
T
A
= 125
o
C
V
DG
= -15V, I
D
= -1mA
I
G
= -1mA, V
DS
= 0V
45
30
0.5
-2
2.0
-15
200
30
V
1.5
-6
4.5
-50
200
mA
pA
I
G
= 1µA, V
DS
= 0V
V
DS
= -15V, I
D
= -1nA
V
DS
= -15V, V
GS
= 0V
V
GS
= 20V, V
DS
= 0V
PARAMETER
TYP
1
270
MIN
MAX
271
UNIT
MIN
MAX
TEST CONDITIONS
e
n
20
V
DS
= -10V, V
GS
= 0V
f = 1kHz
NOTES: 1. For design aid only, not subject to production testing.
2. Pulse test; PW = 300µs, duty cycle
≤
3%.
Discrete Device
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