EEWORLDEEWORLDEEWORLD

Part Number

Search

D-SUB-205AE37BDNDB123

Description
D Type Connector, 37 Contact(s), Female, 0.109 inch Pitch, Solder Terminal, #4-40, Plug
CategoryThe connector    The connector   
File Size124KB,1 Pages
ManufacturerPalPilot
Environmental Compliance
Download Datasheet Parametric View All

D-SUB-205AE37BDNDB123 Overview

D Type Connector, 37 Contact(s), Female, 0.109 inch Pitch, Solder Terminal, #4-40, Plug

D-SUB-205AE37BDNDB123 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPalPilot
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresROHS COMPLIANT,HEX-SCREWS
body width0.492 inch
subject depth0.492 inch
body length2.732 inch
Body/casing typePLUG
Contact to complete cooperationGOLD (30) OVER NICKEL (50)
Contact completed and terminatedTin (Sn) - with Nickel (Ni) barrier
Contact point genderFEMALE
Contact materialCOPPER ALLOY
contact modeSTAGGERED
Contact resistance15 mΩ
Contact styleRND PIN-SKT
Dielectric withstand voltage1000VAC V
Insulation resistance3000000000 Ω
Insulator colorBLACK
insulator materialPOLYBUTYLENE TEREPHTHALATE
JESD-609 codee3
Manufacturer's serial number205
Plug contact pitch0.109 inch
Match contact row spacing0.112 inch
Installation option 1#4-40
Installation option 2RIVET
Installation methodRIGHT ANGLE
Installation typeBOARD
PCB row number2
Number of rows loaded2
Maximum operating temperature105 °C
Minimum operating temperature-55 °C
PCB contact patternSTAGGERED
PCB contact row spacing2.8448 mm
Plating thickness30u inch
Rated current (signal)3 A
GuidelineUL
reliabilityCOMMERCIAL
Shell surfaceNICKEL
Shell materialSTEEL
Terminal length0.125 inch
Terminal pitch2.7686 mm
Termination typeSOLDER
Total number of contacts37
loto oscilloscope practice - ultrasonic ranging module
loto oscilloscope practice - ultrasonic ranging moduleThe ultrasonic ranging module we use here is generally used for automatic obstacle avoidance of Arduino smart cars. Common applications are develo...
LOTO2018 Test/Measurement
FPGA
Could you please help me take a look? I used FPGA to output a 20K square wave, but after measuring it with an oscilloscope, it turned out like this. How can I solve this problem?...
dongweihu123 FPGA/CPLD
EEWORLD University ---- Atmel Software Framework: Software Design Process Example
Atmel Software Framework: Software Design Process Example : https://training.eeworld.com.cn/course/464...
dongcuipin Embedded System
Schematic to PCB conversion problem
Because the current design is in default layer mode, and the package is in add layer mode, you cannot add the package "SOP8". Open the "Layer Settings" dialog box and change the layer mode of the desi...
begin权丿 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1094  72  1587  1536  2063  23  2  32  31  42 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号