PROTECTION PRODUCTS
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SR series has
been specifically designed to protect sensitive compo-
nents which are connected to data and transmission
lines from overvoltage caused by
ESD
(electrostatic
discharge),
EFT
(electrical fast transients), and
light-
ning.
The unique design of the SRDA series devices incorpo-
rates surge rated, low capacitance steering diodes and
a TVS diode in a single package. During transient
conditions, the steering diodes direct the transient to
either the positive side of the power supply line or to
ground. The internal TVS diode prevents over-voltage
on the power line, protecting any downstream compo-
nents.
The low capacitance array configuration allows the user
to protect two high-speed data or transmission lines.
The low inductance construction minimizes voltage
overshoot during high current surges.
RailClamp
Ò
Low Capacitance TVS Diode Array
Features
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Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 24A (8/20µs)
Array of surge rated diodes with internal TVS diode
Protects four I/O lines & power supply line
Low capacitance (<15pF) for high-speed interfaces
Low operating & clamping voltages
Solid-state technology
SRDA3.3-4 THRU SRDA12-4
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Mechanical Characteristics
JEDEC SO-8 package
UL 497B listed
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tube or Tape and Reel per EIA 481
Applications
USB Power & Data Line Protection
T1/E1 secondary IC Side Protection
T3/E3 secondary IC Side Protection
HDSL, IDSL secondary IC Side Protection
Video Line Protection
Microcontroller Input Protection
Base stations
I
2
C Bus Protection
Circuit Diagram
Schematic & PIN Configuration
I/O
REF1
1
8
REF 2
REF 1
I/O 1
I/O 2
I/O 3
I/O 4
2
7
I/O
REF 1
3
6
I/O
REF2
I/O
4
5
REF 2
S0-8 (Top View)
Revision 9/2000
1
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SRDA3.3-4 THRU SRDA12-4
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Peak Pulse Pow er (tp = 8/20µs)
Peak Pulse Current (tp = 8/20µs)
Peak Forw ard Voltage (I
F
= 1A, tp =8/20µs)
Lead Soldering Temp erature
Op erating Temp erature
Storage Temp erature
Symbo l
P
p k
I
PP
V
FP
T
L
T
J
T
STG
Value
500
25
1.5
260 (10 sec.)
-55 to +125
-55 to +150
Units
Watts
A
V
°C
°C
°C
Electrical Characteristics
SR DA3.3-4
1
Par ame te r
Reverse Stand -Off Voltage
Punch -Th rough Voltage
Snap -Back Voltage
Reverse Leakage Current
Clamp ing Voltage
Clamp ing Voltage
Clamp ing Voltage
Junction Cap acitance
Symbo l
V
RWM
V
PT
V
SB
I
R
V
C
V
C
V
C
C
j
I
PT
= 2µ A
I
SB
= 50mA
V
RWM
= 3.3V, T=25°C
I
PP
= 1A , tp = 8/20µ s
I
PP
= 10A , tp = 8/20µ s
I
PP
= 25A , tp = 8/20µ s
Betw een I/O p ins and
Gnd
V
R
= 0V, f = 1MHz
Betw een I/O p ins
V
R
= 0V, f = 1MHz
8
3.5
2.8
1
5.3
10
15
15
Co nd itio ns
Minimum
Typ ical
Maximum
3.3
Units
V
V
V
µA
V
V
V
pF
4
pF
Note:
(1) The SRDA3.3-4 is constructed using Semtechs propri-
etary EPD process technology. See applications section for
more information.
ã
2000 Semtech Corp.
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SRDA3.3-4 THRU SRDA12-4
PROTECTION PRODUCTS
Electrical Characteristics
(continued)
SR DA05-4
Par ame te r
Reverse Stand-Off Voltage
Reverse Breakdow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Clamp ing Voltage
Clamp ing Voltage
Junction Cap acitance
Symbo l
V
RWM
V
BR
I
R
V
C
V
C
V
C
C
j
I
t
= 1mA
V
RWM
= 5V, T=25°C
I
PP
= 1A, tp = 8/20µs
I
PP
= 10A, tp = 8/20µs
I
PP
= 25A, tp = 8/20µs
Betw een I/O p ins and
Gnd
V
R
= 0V, f = 1MHz
Betw een I/O p ins
V
R
= 0V, f = 1MHz
8
6
10
9.8
12
20
15
Co nd itio ns
Minimum
Typ ical
Maximum
5
Units
V
V
µA
V
V
V
pF
4
pF
SR DA12-4
Par ame te r
Reverse Stand-Off Voltage
Reverse Breakdow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Clamp ing Voltage
Clamp ing Voltage
Junction Cap acitance
Symbo l
V
RWM
V
BR
I
R
V
C
V
C
V
C
C
j
I
t
= 1mA
V
RWM
= 12V, T=25°C
I
PP
= 1A, tp = 8/20µs
I
PP
= 10A, tp = 8/20µs
I
PP
= 20A, tp = 8/20µs
Betw een I/O p ins and
Gnd
V
R
= 0V, f = 1MHz
Betw een I/O p ins
V
R
= 0V, f = 1MHz
8
13.3
1
17
20
25
15
Co nd itio ns
Minimum
Typ ical
Maximum
12
Units
V
V
µA
V
V
V
pF
4
pF
ã
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SRDA3.3-4 THRU SRDA12-4
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
110
100
Power Derating Curve
Peak Pulse Power - P
PP
(kW)
% of Rated Power or I
PP
90
80
70
60
50
40
30
20
10
1
0.1
0.01
0.1
1
10
Pulse Duration - tp (µs)
100
1000
0
0
25
50
75
100
125
150
Ambient Temperature - T
A
(
o
C)
Pulse Waveform
110
100
90
80
Percent of I
PP
70
60
50
40
30
20
10
0
0
5
10
15
Time (µs)
20
25
30
td = I
PP
/2
e
-t
Clamping Voltage vs. Peak Pulse Current
Waveform
Parameters:
tr = 8µs
td = 20µs
22
20
Clamping Voltage - V
C
(V)
18
16
14
12
10
8
6
4
2
0
0
5
10
15
20
25
30
35
Peak Pulse Current - I
PP
(A)
Waveform
Parameters:
tr = 8µs
td = 20µs
SRDA3.3-4
SRDA05-4
SRDA12-4
Variation of Capacitance vs. Reverse Voltage
0
-2
% Change in Capacitance
-4
-6
-8
-10
-12
1
-14
0
1
2
3
Reverse Voltage (V)
4
5
6
0
0
I/O to GND
f = 1MHz
Forward Voltage - V
F
(V)
10
9
8
7
6
5
4
3
2
Forward Voltage vs. Forward Current
Waveform
Parameters:
tr = 8µs
td = 20µs
5
10
15
20
25
30
35
40
45
50
Forward Current - I
F
(A)
ã
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SRDA3.3-4 THRU SRDA12-4
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Four
High-Speed Lines
The SRDA TVS is designed to protect four data lines
from transient overvoltages by clamping them to a
fixed reference. When the voltage on the protected
line exceeds the reference voltage (plus diode V
F
) the
steering diodes are forward biased, conducting the
transient current away from the sensitive circuitry.
Data lines are connected at pins 1, 4, 6 and 7. The
negative reference is connected at pins 5 & 8. These
pins should be connected directly to a ground plane on
the board for best results. The path length is kept as
short as possible to minimize parasitic inductance.
The positive reference is connected at pins 2 and 3.
The options for connecting the positive reference are
as follows:
1. To protect data lines and the power line, connect
pins 2 & 3 directly to the positive supply rail (V
CC
).
In this configuration the data lines are referenced
to the supply voltage. The internal TVS diode
prevents over-voltage on the supply rail.
2. The SRDA can be isolated from the power supply by
adding a series resistor between pins 2 & 3 and
V
CC
. A value of 10kW is recommended. The
internal TVS and steering diodes remain biased,
providing the advantage of lower capacitance.
3. In applications where no positive supply reference
is available, or complete supply isolation is desired,
the internal TVS may be used as the reference. In
this case, pins 2 & 3 are not connected. The
steering diodes will begin to conduct when the
voltage on the protected line exceeds the working
voltage of the TVS (plus one diode drop).
ESD Protection With RailClamps
RailClamps are optimized for ESD protection using the
rail-to-rail topology. Along with good board layout,
these devices virtually eliminate the disadvantages of
using discrete components to implement this topology.
Consider the situation shown in Figure 1 where dis-
crete diodes or diode arrays are configured for rail-to-
rail protection on a high speed line. During positive
duration ESD events, the top diode will be forward
biased when the voltage on the protected line exceeds
the reference voltage plus the V drop of the diode.
F
For negative events, the bottom diode will be biased
when the voltage exceeds the V of the diode. At first
F
Data Line and Power Supply Protection Using Vcc as
reference
Data Line Protection with Bias and Power Supply
Isolation Resistor
Data Line Protection Using Internal TVS Diode as
Reference
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