NX3L1T53
Low-ohmic single-pole double-throw analog switch
Rev. 04 — 24 March 2010
Product data sheet
1. General description
The NX3L1T53 is a low-ohmic single-pole double-throw analog switch suitable for use as
an analog or digital 2:1 multiplexer/demultiplexer. It has a digital select input (S), two
independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an active LOW
enable input (E). When pin E is HIGH, the switch is turned off.
Schmitt trigger action at the digital inputs makes the circuit tolerant to slower input rise and
fall times. Low threshold digital inputs allows this device to be driven by 1.8 V logic levels
in 3.3 V applications without significant increase in supply current I
CC
. The NX3L1T53
allows signals with amplitude up to V
CC
to be transmitted from Z to Y0 or Y1; or from Y0 or
Y1 to Z. It’s low ON resistance (0.5
Ω)
and flatness (0.13
Ω)
ensures minimal attenuation
and distortion of transmitted signals.
2. Features
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance (peak):
1.6
Ω
(typical) at V
CC
= 1.4 V
1.0
Ω
(typical) at V
CC
= 1.65 V
0.55
Ω
(typical) at V
CC
= 2.3 V
0.50
Ω
(typical) at V
CC
= 2.7 V
0.50
Ω
(typical) at V
CC
= 4.3 V
Break-before-make switching
High noise immunity
ESD protection:
HBM JESD22-A114E Class 3A exceeds 7500 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
IEC61000-4-2 contact discharge exceeds 8000 V for switch ports
CMOS low-power consumption
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
1.8 V control logic at V
CC
= 3.6 V
Control input accepts voltages above supply voltage
Very low supply current, even when input is below V
CC
High current handling capability (350 mA continuous current under 3.3 V supply)
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
NXP Semiconductors
NX3L1T53
Low-ohmic single-pole double-throw analog switch
3. Applications
Cell phone
PDA
Portable media player
4. Ordering information
Table 1.
Ordering information
Package
Temperature range
NX3L1T53GT
NX3L1T53GD
NX3L1T53GM
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
XSON8
Description
plastic extremely thin small outline package; no leads;
8 terminals; body 1
×
1.95
×
0.5 mm
Version
SOT833-1
SOT996-2
SOT902-1
Type number
XSON8U plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3
×
2
×
0.5 mm
XQFN8U plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6
×
1.6
×
0.5 mm
5. Marking
Table 2.
Marking codes
[1]
Marking code
M53
M53
M53
Type number
NX3L1T53GT
NX3L1T53GD
NX3L1T53GM
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
NX3L1T53_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
2 of 24
NXP Semiconductors
NX3L1T53
Low-ohmic single-pole double-throw analog switch
6. Functional diagram
6 Y1
7 Y0
E
2
S 5
Z 1
001aad386
Fig 1.
Logic symbol
Y0
S
Z
Y1
E
001aad387
Fig 2.
Logic diagram
7. Pinning information
7.1 Pinning
NX3L1T53
Z
1
8
V
CC
NX3L1T53
Z
E
1
2
3
4
8
7
6
5
V
CC
Y0
Y1
S
E
2
7
Y0
GND
3
6
Y1
GND
GND
4
5
S
GND
001aaj537
001aaj955
Transparent top view
Transparent top view
Fig 3.
Pin configuration SOT833-1 (XSON8)
Fig 4.
Pin configuration SOT996-2 (XSON8U)
NX3L1T53_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
3 of 24
NXP Semiconductors
NX3L1T53
Low-ohmic single-pole double-throw analog switch
NX3L1T53
terminal 1
index area
Y0
1
V
CC
8
7
Z
Y1
2
6
E
S
3
4
5
GND
GND
001aaj538
Transparent top view
Fig 5.
Pin configuration SOT902-1 (XQFN8U)
7.2 Pin description
Table 3.
Symbol
Z
E
GND
GND
S
Y1
Y0
V
CC
Pin description
Pin
SOT833-1 and SOT996-2
1
2
3
4
5
6
7
8
SOT902-1
7
6
5
4
3
2
1
8
common output or input
enable input (active LOW)
ground (0 V)
ground (0 V)
select input
independent input or output
independent input or output
supply voltage
Description
8. Functional description
Table 4.
Input
S
L
H
X
[1]
Function table
[1]
Channel on
E
L
L
H
Y0 to Z or Z to Y0
Y1 to Z or Z to Y1
switch off
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
NX3L1T53_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
4 of 24
NXP Semiconductors
NX3L1T53
Low-ohmic single-pole double-throw analog switch
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
SW
I
IK
I
SK
I
SW
Parameter
supply voltage
input voltage
switch voltage
input clamping current
switch clamping current
switch current
V
I
<
−0.5
V
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
SW
>
−0.5
V or V
SW
< V
CC
+ 0.5 V;
source or sink current
V
SW
>
−0.5
V or V
SW
< V
CC
+ 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
T
stg
P
tot
[1]
[2]
[3]
Conditions
select input S and enable input E
[1]
[2]
Min
−0.5
−0.5
−0.5
−50
-
-
-
Max
+4.6
+4.6
-
±50
±350
±500
Unit
V
V
mA
mA
mA
mA
V
CC
+ 0.5 V
storage temperature
total power dissipation
T
amb
=
−40 °C
to +125
°C
[3]
−65
-
+150
250
°C
mW
The minimum input voltage rating may be exceeded if the input current rating is observed.
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not
exceed 4.6 V.
For XSON8, XSON8U and XQFN8U packages: above 118
°C
the value of P
tot
derates linearly with 7.8 mW/K.
10. Recommended operating conditions
Table 6.
V
CC
V
I
V
SW
T
amb
Δt/ΔV
[1]
Recommended operating conditions
Conditions
select input S and enable
input E
[1]
Symbol Parameter
supply voltage
input voltage
switch voltage
ambient temperature
Min
1.4
0
0
−40
[2]
Typ
-
-
-
-
-
Max
4.3
4.3
V
CC
+125
200
Unit
V
V
V
°C
ns/V
input transition rise and fall rate V
CC
= 1.4 V to 4.3 V
-
To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit
for the voltage drop across the switch.
Applies to control signal levels.
[2]
NX3L1T53_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
5 of 24
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