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P4C1256-55DWMB

Description
HIGH SPEED 32K x 8 STATIC CMOS RAM
File Size91KB,8 Pages
ManufacturerETC1
Download Datasheet View All

P4C1256-55DWMB Overview

HIGH SPEED 32K x 8 STATIC CMOS RAM

P4C1256
P4C1256
HIGH SPEED 32K x 8
STATIC CMOS RAM
FEATURES
High Speed (Equal Access and Cycle Times)
— 12/15/20/25/35 ns (Commercial)
— 15/20/25/35/45 ns (Industrial)
— 20/25/35/45/55/70 ns (Military)
Low Power
— 880 mW Active (Commercial)
Single 5V
±
10% Power Supply
Easy Memory Expansion Using
CE
and
OE
Inputs
Common Data I/O
Three-State Outputs
Fully TTL Compatible Inputs and Outputs
Advanced CMOS Technology
Fast t
OE
Automatic Power Down
Packages
—28-Pin 300 mil DIP and SOJ
—28-Pin 600 mil Ceramic DIP
—28-Pin LCC(350 mil x 550 mil)
—32-Pin LCC (450 mil x 550 mil)
DESCRIPTION
The P4C1256 is a 262,144-bit high-speed CMOS
static RAM organized as 32Kx8. The CMOS memory
requires no clocks or refreshing, and has equal access
and cycle times. Inputs are fully TTL-compatible. The
RAM operates from a single 5V±10% tolerance power
supply.
Access times as fast as 12 nanoseconds permit greatly
enhanced system operating speeds. CMOS is utilized
to reduce power consumption to a low level. The
P4C1256 is a member of a family of PACE RAM™ prod-
ucts offering fast access times.
The P4C1256 device provides asynchronous operation with
matching access and cycle times. Memory locations are
specified on address pins A
0
to A
14
. Reading is accom-
plished by device selection (CE and output enabling (OE)
while write enable (WE) remains HIGH. By presenting the
address under these conditions, the data in the addressed
memory location is presented on the data input/output pins.
The input/output pins stay in the HIGH Z state when either
CE
or
OE
is HIGH or
WE
is LOW.
Package options for the P4C1256 include 28-pin 300 mil
DIP and SOJ packages. For military temperature range,
Ceramic DIP and LCC packages are available.
FUNCTIONAL BLOCK DIAGRAM
ROW SELECT
A
•• •
PIN CONFIGURATIONS
VCC
A2
A1
A0
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
(8)
A
262,144-BIT
MEMORY
ARRAY
WE
A14
A13
A12
A2
A3
A4
A5
4
3
A0
2
1
NC
A3
A4
A5
A6
A7
A8
A9
NC
I/O1
5
6
7
8
9
10
11
12
32 31 30
29
28
27
26
25
24
23
22
WE
A14
A 13
A 12
A 11
NC
OE
A 10
CE
I/O8
I/O7
I/O
1
•••
••• •••
•••
A
11
OE
A
10
CE
I/0
8
I/0
7
I/0
6
I/0
5
I/0
4
A6
COLUMN I/O
INPUT
DATA
CONTROL
A7
A8
A9
• ••
•••
I/O
2
I/0
1
I/0
2
COLUMN
SELECT
13
21
14 15 16 17 18 19 20
I/O2
I/O3
GND
I/O4
I/O5
I/O6
NC
I/0
3
GND
WE
•••
•••
CE
OE
A
(7)
A
DIP (P5, C5, D5-1), SOJ (J5)
TOP VIEW
1519B
32 LCC (L6)
TOP VIEW
See Selection Guide page for 28-pin LCC
Means Quality, Service and Speed
1Q97
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