P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
2 kB 3 V flash with 8-bit A/D converter
Rev. 05 — 15 December 2009
Product data sheet
1. General description
The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,
based on a high performance processor architecture that executes instructions in two to
four clocks, six times the rate of standard 80C51 devices. Many system-level functions
have been incorporated into the P89LPC915/916/917 in order to reduce component
count, board space, and system cost.
2. Features
2.1 Principal features
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2 kB byte-erasable flash code memory organized into 256-byte sectors and 16-byte
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
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256-byte RAM data memory.
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Two 16-bit counter/timers. Timer 0 (and Timer 1 - P89LPC917) may be configured to
toggle a port output upon timer overflow or to become a PWM output.
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23-bit system timer that can also be used as a Real-Time clock.
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4-input multiplexed 8-bit A/D converter/single DAC output. Two analog comparators
with selectable reference.
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Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
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SPI communication port (P89LPC916).
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Internal RC oscillator option allows operation without external oscillator components.
The RC oscillator (factory calibrated to
±1
%) option is selectable and fine tunable.
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2.4 V to 3.6 V V
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
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Up to 14 I/O pins when using internal oscillator and reset options (P89LPC916,
P89LPC917).
2.2 Additional features
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14-pin (P89LPC915) and 16-pin (P89LPC916, P89LPC917) TSSOP packages.
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A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.
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In-Application Programming (IAP-Lite) and byte erase allows code memory to be used
for non-volatile data storage.
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
I
Serial Flash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
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Watchdog timer with separate on-chip oscillator, requiring no external components.
The Watchdog prescaler is selectable from 8 values.
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Low voltage brownout detect allows a graceful system shutdown when power fails.
May optionally be configured as an interrupt.
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Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 1
µA
(total power-down with voltage comparators disabled).
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Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent spurious
and incomplete resets. A software reset function is also available.
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Programmable port output configuration options: quasi-bidirectional, open drain,
push-pull, input-only.
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Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
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LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
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Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
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Only power and ground connections are required to operate the P89LPC915/916/917
when internal reset option is selected.
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Four interrupt priority levels.
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Five (P89LPC916), six (P89LPC915), or seven (P89LPC917) keypad interrupt inputs.
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Second data pointer.
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Schmitt trigger port inputs.
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Emulation support.
3. Product comparison overview
Table 1
highlights the differences between these three devices. For a complete list of
device features, please see
Section 2 “Features”.
Table 1.
Product comparison overview
Comparator 2
output
X
-
X
SPI
-
X
-
T1 toggle/PWM CLKOUT
-
-
X
-
-
X
INT1
X
-
X
KBI
6
5
7
Type number
P89LPC915
P89LPC916
P89LPC917
P89LPC915_916_917_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 15 December 2009
2 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
4. Ordering information
Table 2.
Ordering information
Package
Name
P89LPC915FDH
P89LPC915FN
P89LPC915HDH
P89LPC916FDH
P89LPC917FDH
TSSOP14
DIP14
TSSOP14
TSSOP16
TSSOP16
Description
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
plastic dual in-line package; 14 leads (300 mil)
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
plastic thin shrink small outline package;
16 leads; body width 4.4 mm
plastic thin shrink small outline package;
16 leads; body width 4.4 mm
Version
SOT402-1
SOT27-1
SOT402-1
SOT403-1
SOT403-1
Type number
4.1 Ordering options
Table 3.
Ordering options
[1]
Temperature range
−40 °C
to +85
°C
Frequency
0 MHz to 18 MHz
Type number
P89LPC915FDH
P89LPC915FN
P89LPC916FDH
P89LPC917FDH
P89LPC915HDH
[1]
−40 °C
to +125
°C
Please contact your local NXP sales office for availability of extended temperature (−40
°C
to +125
°C)
versions of the P89LPC916 and P89LPC917 devices.
P89LPC915_916_917_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 15 December 2009
3 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
5. Block diagram
P89LPC915
HIGH PERFORMANCE
ACCELERATED 2-CLOCK 80C51 CPU
TXD
2 kB CODE FLASH
internal bus
UART
RXD
SCL
256 BYTE DATA RAM
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2
C
SDA
AD10
AD11
AD12
AD13
DAC1
P1[5:0]
PORT 1
CONFIGURABLE I/O
ADC1/DAC1
P0[5:0]
PORT 0
CONFIGURABLE I/O
REAL TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
KEYPAD INTERRUPT
T0
WATCHDOG TIMER
AND OSCILLATOR
ANALOG
COMPARATORS
CMP2
CIN2B
CIN2A
CIN1A
CIN1B
CMPREF
PROGRAMMABLE
OSCILLATOR DIVIDER
external clock
input
ON-CHIP RC
OSCILLATOR
CPU clock
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
002aaa822
Fig 1.
P89LPC915 block diagram
P89LPC915_916_917_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 15 December 2009
4 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
P89LPC916
HIGH PERFORMANCE
ACCELERATED 2-CLOCK 80C51 CPU
TXD
2 kB CODE FLASH
internal bus
UART
RXD
SCL
256 BYTE DATA RAM
I
2
C
SDA
AD10
AD11
AD12
AD13
DAC1
SPICLK
MOSI
MISO
SS
P2[5:2]
PORT 2
CONFIGURABLE I/O
ADC1/DAC1
P1.5, P1[3:0]
PORT 1
CONFIGURABLE I/O
SPI
P0[5:1]
PORT 0
CONFIGURABLE I/O
REAL TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
KEYPAD INTERRUPT
T0
WATCHDOG TIMER
AND OSCILLATOR
ANALOG
COMPARATORS
CIN2B
CIN2A
CIN1A
CIN1B
CMPREF
PROGRAMMABLE
OSCILLATOR DIVIDER
external clock
input
ON-CHIP RC
OSCILLATOR
CPU clock
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
002aaa823
Fig 2.
P89LPC916 block diagram
P89LPC915_916_917_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 15 December 2009
5 of 75
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