PAL12L6JM datasheet, PDF - EEWORLD Datasheet

PAL12L6JM: DescriptionProgammable Array Logic Series 24 (PAL Series 24); CategoryProgrammable logic devices Programmable logic; File Size449KB，14 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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PAL12L6JM Overview

Progammable Array Logic Series 24 (PAL Series 24)

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	DIP, DIP20,.3
Reach Compliance Code	unknow
ECCN code	3A001.A.2.C
Other features	ACTIVE LOW OUTPUT
Architecture	PAL-TYPE
JESD-30 code	R-GDIP-T20
JESD-609 code	e0
length	24.51 mm
Dedicated input times	12
Number of I/O lines
Number of entries	12
Output times	6
Number of product terms	16
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	12 DEDICATED INPUTS, 0 I/O
Output function	COMBINATORIAL
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	OT PLD
propagation delay	45 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	TTL
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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