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PAL14L8AJM

Description
Progammable Array Logic Series 24 (PAL Series 24)
CategoryProgrammable logic devices    Programmable logic   
File Size449KB,14 Pages
ManufacturerNational Semiconductor(TI )
Websitehttp://www.ti.com
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PAL14L8AJM Overview

Progammable Array Logic Series 24 (PAL Series 24)

PAL14L8AJM Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNational Semiconductor(TI )
package instructionDIP, DIP24,.3
Reach Compliance Codeunknow
ECCN code3A001.A.2.C
Other featuresACTIVE LOW OUTPUT
ArchitecturePAL-TYPE
JESD-30 codeR-GDIP-T24
JESD-609 codee0
Dedicated input times14
Number of I/O lines
Number of entries14
Output times8
Number of product terms20
Number of terminals24
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize14 DEDICATED INPUTS, 0 I/O
Output functionCOMBINATORIAL
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeOT PLD
propagation delay30 ns
Certification statusNot Qualified
Maximum seat height5.715 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyTTL
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
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