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PBSS3540M

Description
40 V, 0.5 A PNP low VCEsat (BISS) transistor
CategoryDiscrete semiconductor    The transistor   
File Size84KB,9 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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PBSS3540M Overview

40 V, 0.5 A PNP low VCEsat (BISS) transistor

PBSS3540M Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSC-101
package instruction1.0 X 0.6 MM, 0.5 MM HEIGHT, LEADLESS ULTRA SMALL, PLASTIC, SC-101, 3 PIN
Contacts3
Reach Compliance Codecompli
ECCN codeEAR99
Shell connectionCOLLECTOR
Maximum collector current (IC)0.5 A
Collector-emitter maximum voltage40 V
ConfigurationSINGLE
Minimum DC current gain (hFE)200
JESD-30 codeR-PBCC-N3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)260
Polarity/channel typePNP
Maximum power dissipation(Abs)0.43 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin (Sn)
Terminal formNO LEAD
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
transistor applicationsSWITCHING
Transistor component materialsSILICON
Nominal transition frequency (fT)300 MHz
DISCRETE SEMICONDUCTORS
DATA SHEET
M3D883
BOTTOM VIEW
PBSS3540M
40 V, 0.5 A
PNP low V
CEsat
(BISS) transistor
Product data sheet
2003 Aug 12

PBSS3540M Related Products

PBSS3540M PBSS3540M,315
Description 40 V, 0.5 A PNP low VCEsat (BISS) transistor 40 V, 0.5 A PNP low VCEsat (BISS) transistor
Is it Rohs certified? conform to conform to
Maker NXP NXP
Parts packaging code SC-101 DFN
package instruction 1.0 X 0.6 MM, 0.5 MM HEIGHT, LEADLESS ULTRA SMALL, PLASTIC, SC-101, 3 PIN 1.0 X 0.6 MM, 0.5 MM HEIGHT, LEADLESS ULTRA SMALL, PLASTIC, SC-101, 3 PIN
Contacts 3 3
Reach Compliance Code compli compli
ECCN code EAR99 EAR99
Shell connection COLLECTOR COLLECTOR
Maximum collector current (IC) 0.5 A 0.5 A
Collector-emitter maximum voltage 40 V 40 V
Configuration SINGLE SINGLE
Minimum DC current gain (hFE) 200 200
JESD-30 code R-PBCC-N3 R-PBCC-N3
JESD-609 code e3 e3
Humidity sensitivity level 1 1
Number of components 1 1
Number of terminals 3 3
Maximum operating temperature 150 °C 150 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form CHIP CARRIER CHIP CARRIER
Peak Reflow Temperature (Celsius) 260 NOT SPECIFIED
Polarity/channel type PNP PNP
Maximum power dissipation(Abs) 0.43 W 0.43 W
Certification status Not Qualified Not Qualified
surface mount YES YES
Terminal surface Tin (Sn) Tin (Sn)
Terminal form NO LEAD NO LEAD
Terminal location BOTTOM BOTTOM
Maximum time at peak reflow temperature 30 NOT SPECIFIED
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
Nominal transition frequency (fT) 300 MHz 300 MHz
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