LT1994C............................................... –40°C to 85°C
LT1994I ................................................ –40°C to 85°C
LT1994H ............................................ –40°C to 125°C
LT1994MP.......................................... –55°C to 125°C
Specified Temperature Range (Note 5)
LT1994C................................................... 0°C to 70°C
LT1994I ................................................ –40°C to 85°C
LT1994H ............................................ –40°C to 125°C
LT1994MP.......................................... –55°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
IN
–
1
V
OCM
2
V
+
3
OUT
+
4
8 IN
+
7 SHDN
6 V
–
5 OUT
–
IN
–
1
V
OCM
2
V
+
3
OUT
+
4
TOP VIEW
8
7
6
5
IN
+
SHDN
V
–
OUT
–
DD PACKAGE
8-LEAD (3mm 3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO V
–
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 140°C/W
ORDER INFORMATION
LEAD FREE FINISH
LT1994CDD#PBF
LT1994IDD#PBF
LT1994HDD#PBF
LT1994MPDD#PBF
LT1994CMS8#PBF
LT1994IMS8#PBF
TAPE AND REEL
LT1994CDD#TRPBF
LT1994IDD#TRPBF
LT1994HDD#TRPBF
LT1994MPDD#TRPBF
LT1994CMS8#TRPBF
LT1994IMS8#TRPBF
PART MARKING*
LBQM
LBQM
LBQM
LDXQ
LTBQN
LTBQN
PACKAGE DESCRIPTION
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead Plastic MSOP
8-Lead Plastic MSOP
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
–55°C to 125°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
1994fb
2
LT1994
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= mid-supply, V
SHDN
= OPEN,
R
I
= R
F
= 499Ω, R
L
= 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. V
S
is defined (V
+
– V
–
). V
OUTCM
is defined
as (V
OUT+
+ V
OUT–
)/2. V
ICM
is defined as (V
IN+
+ V
IN–
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
IN+
– V
IN–
).
SYMBOL
V
OSDIFF
PARAMETER
Differential Offset Voltage
(Input Referred)
CONDITIONS
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
Common Mode
Differential Mode
Differential
f = 50kHz
f = 50kHz
f = 50kHz, V
OCM
Shorted to Ground
V
S
= 3V
V
S
= ±5V
V
S
= 3V,
ΔV
ICM
= 0.75V
V
S
= 5V,
ΔV
OCM
= 2V
V
S
= 3V to ±5V
V
S
= 3V to ±5V
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
ELECTRICAL CHARACTERISTICS
C/I GRADES
MIN
TYP MAX
±2
±2
±2
±3
3
3
3
3
–45
–45
–45
–45
–18
–18
–18
–18
±0.2
±0.2
±0.2
±0.2
700
4.5
2
3
2.5
15
0
–5
55
65
69
45
85
85
105
70
1
–0.15
±1
1.75
3.75
–3
–3
–3
–3
±2
±2
±3
±4
H/MP GRADES
MIN
TYP MAX
±2
±2
±2
±3
UNITS
mV
mV
mV
mV
μV/°C
μV/°C
μV/°C
μV/°C
ΔV
OSDIFF
/ΔT Differential Offset Voltage Drift
(Input Referred)
I
B
Input Bias Current (Note 6)
–45
–45
–45
–45
–18
–18
–18
–18
±0.2
±0.2
±0.2
±0.2
700
4.5
2
3
2.5
15
–3
–3
–3
–3
±2
±2
±3
±4
μA
μA
μA
μA
μA
μA
μA
μA
kΩ
kΩ
pF
nV/√Hz
pA/√Hz
nV/√Hz
I
OS
Input Offset Current (Note 6)
R
IN
C
IN
e
n
i
n
e
nVOCM
V
ICMR
(Note 7)
CMRRI
(Note 8)
CMRRIO
(Note 8)
PSRR
(Note 9)
PSRRCM
(Note 9)
G
CM
Input Resistance
Input Capacitance
Differential Input Referred Noise
Voltage Density
Input Noise Current Density
Input Referred Common Mode Output
Noise Voltage Density
Input Signal Common Mode Range
Input Common Mode Rejection Ratio
(Input Referred)
ΔV
ICM
/ΔV
OSDIFF
Output Common Mode Rejection Ratio
(Input Referred)
ΔV
OCM
/ΔV
OSDIFF
Differential Power Supply Rejection
(ΔV
S
/ΔV
OSDIFF
)
Output Common Mode Power Supply
Rejection (ΔV
S
/ΔV
OSCM
)
0
–5
55
65
69
45
85
85
105
70
1.75
3.75
V
V
dB
dB
dB
dB
V/V
%
Common Mode Gain (ΔV
OUTCM
/ΔV
OCM
) V
S
= ±2.5V
Common Mode Gain Error
V
S
= ±2.5V
100 • (G
CM
– 1)
Output Balance (ΔV
OUTCM
/ΔV
OUTDIFF
)
ΔV
OUTDIFF
= 2V
Single-Ended Input
Differential Input
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
BAL
l
l
l
l
l
l
–65
–71
±2.5
±2.5
±2.5
±2.5
–46
–50
±25
±25
±30
±40
–65
–71
±2.5
±2.5
±2.5
±2.5
–46
–50
±25
±25
±30
±40
dB
dB
mV
mV
mV
mV
V
OSCM
Common Mode Offset Voltage
(V
OUTCM
– V
OCM
)
1994fb
3
LT1994
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= mid-supply, V
SHDN
= OPEN,
R
I
= R
F
= 499Ω, R
L
= 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. V
S
is defined (V
+
– V
–
). V
OUTCM
is defined
as (V
OUT+
+ V
OUT–
)/2. V
ICM
is defined as (V
IN+
+ V
IN–
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
IN+
– V
IN–
).
SYMBOL
ΔV
OSCM
/ΔT
PARAMETER
Common Mode Offset Voltage Drift
CONDITIONS
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 3V, ±5V
l
l
ELECTRICAL CHARACTERISTICS
C/I GRADES
MIN
TYP MAX
5
5
5
5
V
–
+
1.1
30
2.45
40
2.5
70
90
200
150
200
900
30
50
125
80
125
900
±25
±30
±40
±45
50
50
58
58
±35
±40
±65
±85
65
65
70
70
85
85
V
+
– 0.8
60
2.55
140
175
400
325
450
2400
70
90
250
180
250
2400
H/MP GRADES
MIN
TYP MAX
5
5
5
5
V
–
+
1.1
30
2.45
40
2.5
70
90
200
150
200
900
30
50
125
80
125
900
±10
±15
±40
±45
50
50
58
58
±35
±40
±65
±85
65
65
70
70
85
85
V
+
– 0.8
60
2.55
140
175
400
325
450
2400
70
90
250
180
250
2400
UNITS
μV/°C
μV/°C
μV/°C
μV/°C
V
kΩ
V
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
mA
mA
V/μS
V/μS
MHz
MHz
V
OUTCMR
(Note 7)
R
INVOCM
V
MID
V
OUT
Output Signal Common Mode Range
(Voltage Range for the V
OCM
Pin)
Input Resistance, V
OCM
Pin
Voltage at the V
OCM
Pin
V
S
= 5V
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
Output Voltage, High, Either Output Pin V
S
= 3V, No Load
(Note 10)
V
S
= 3V, R
L
= 800Ω
V
S
= 3V, R
L
= 100Ω
V
S
= ±5V, No Load
V
S
= ±5V, R
L
= 800Ω
V
S
= ±5V, R
L
= 100Ω
Output Voltage, Low, Either Output Pin
(Note 10)
V
S
= 3V, No Load
V
S
= 3V, R
L
= 800Ω
V
S
= 3V, R
L
= 100Ω
V
S
= ±5V, No Load
V
S
= ±5V, R
L
= 800Ω
V
S
= ±5V, R
L
= 100Ω
I
SC
Output Short-Circuit Current, Either
Output Pin (Note 11)
V
S
= 2.375V, R
L
= 10Ω
V
S
= 3V, R
L
= 10Ω
V
S
= 5V, R
L
= 10Ω
V
S
= ±5V, V
CM
= 0V, R
L
= 10Ω
V
S
= 5V,
ΔV
OUT+
= –ΔV
OUT–
= 1V
V
S
= ±5V, V
CM
= 0V,
ΔV
OUT+
= –ΔV
OUT–
= 1.8V
V
S
= 3V, T
A
= 25°C
V
S
= ±5V, V
CM
= 0V, T
A
= 25°C
V
S
= 3V, R
L
= 800Ω, f
IN
= 1MHz,
V
OUT+
– V
OUT–
= 2V
P-P
Differential Input
2nd Harmonic
3rd Harmonic
Single-Ended Input
2nd Harmonic
3rd Harmonic
V
S
= 3V, 0.01%, 2V Step
V
S
= 3V, 0.1%, 2V Step
V
S
= 3V
SR
Slew Rate
GBW
Gain-Bandwidth Product
(f
TEST
= 1MHz)
Distortion
–99
–96
–94
–108
120
90
100
l
–99
–96
–94
–108
120
90
100
12.6
2.375
13.3
13.9
14.8
0.225
0.375
0.7
12.6
20.0
20.5
21.5
0.8
1.75
2.5
18.5
19.5
20.5
0.8
1.75
2.5
dBc
dBc
dBc
dBc
ns
ns
dB
V
mA
mA
mA
mA
mA
mA
t
S
A
VOL
V
S
I
S
Settling Time
Large-Signal Voltage Gain
Supply Voltage Range
Supply Current
2.375
13.3
13.9
14.8
0.225
0.375
0.7
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 3V
V
S
= 5V
V
S
= ±5V
l
l
l
l
l
l
I
SHDN
Supply Current in Shutdown
1994fb
4
LT1994
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= mid-supply, V
SHDN
= OPEN,
R
I
= R
F
= 499Ω, R
L
= 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. V
S
is defined (V
+
– V
–
). V
OUTCM
is defined
as (V
OUT+
+ V
OUT–
)/2. V
ICM
is defined as (V
IN+
+ V
IN–
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
IN+
– V
IN–
).
SYMBOL
V
IL
V
IH
R
SHDN
t
ON
t
OFF
PARAMETER
SHDN
Input Logic Low
SHDN
Input Logic High
SHDN
Pull-Up Resistor
Turn-On Time
Turn-Off Time
CONDITIONS
V
S
= 3V to ±5V
V
S
= 3V to ±5V
V
S
= 2.375V to ±5V
V
SHDN
0.5V to 3V
V
SHDN
3V to 0.5V
l
l
ELECTRICAL CHARACTERISTICS
C/I GRADES
MIN
TYP MAX
V
+
– 2.1
V
+
– 0.6
40
55
1
1
75
H/MP GRADES
MIN
TYP MAX
V
+
– 2.1
V
+
– 0.6
40
55
1
1
75
UNITS
V
V
kΩ
μs
μs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The inputs are protected by a pair of back-to-back diodes. If the
differential input voltage exceeds 1V, the input current should be limited to
less than 10mA.
Note 3:
A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4:
The LT1994C/LT1994I are guaranteed functional over the
operating temperature range –40°C to 85°C. The LT1994H is guaranteed
functional over the operating temperature range –40°C to 125°C. The
LT1994MP is guaranteed functional over the operating temperature range
–55°C to 125°C.
Note 5:
The LT1994C is guaranteed to meet specified performance from
0°C to 70°C. The LT1994C is designed, characterized, and expected to
meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LT1994I is guaranteed to meet
specified performance from –40°C to 85°C. The LT1994H is guaranteed
to meet specified performance from –40°C to 125°C. The LT1994MP is
guaranteed to meet specified performance from –55°C to 125°C.
Note 6:
Input bias current is defined as the average of the input currents
flowing into Pin 1 and Pin 8 (IN
–
and IN
+
). Input Offset current is defined
as the difference of the input currents flowing into Pin 8 and Pin 1
(I
OS
= I
B+
– I
B–
).
Note 7:
Input Common Mode Range is tested using the Test Circuit of
Figure 1 (R
F
= R
I
) by applying a single ended 2V
P-P
, 1kHz signal to V
INP
(V
INM
= 0), and measuring the output distortion (THD) at the common
mode Voltage Range limits listed in the Electrical Characteristics table,
and confirming the output THD is better than –40dB. The voltage range for
the output common mode range (Pin 2) is tested using the Test Circuit of
Figure 1 (R
F
= R
I
) by applying a 0.5V peak, 1kHz signal to the V
OCM
Pin 2 (with V
INP
= V
INM
= 0) and measuring the output distortion (THD)
at V
OUTCM
with V
OCM
biased 0.5V from the V
OCM
pin range limits listed
in the Electrical Characteristics Table, and confirming the THD is better
than –40dB.
Note 8:
Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins IN
+
or IN
–
to the change in differential
input referred voltage offset. Output CMRR is defined as the ratio of the
change in the voltage at the V
OCM
pin to the change in differential input
referred voltage offset.
Note 9:
Differential Power Supply Rejection (PSRR) is defined as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common Mode Power Supply Rejection (PSRRCM) is
defined as the ratio of the change in supply voltage to the change in the
common mode offset, V
OUTCM
– V
OCM
.
Note 10:
Output swings are measured as differences between the output
and the respective power supply rail.
Note 11:
Extended operation with the output shorted may cause junction
temperatures to exceed the 150°C limit and is not recommended.
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stm32/stm8
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