LTC1566-1
Low Noise 2.3MHz
Continuous Time Lowpass Filter
FEATURES
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DESCRIPTIO
7th Order, 2.3MHz Lowpass Filter in an SO-8
62µV
RMS
Input Referred Noise
Operates on a Single 5V or a
±5V
Supply
Differential Inputs and Outputs
Low Offset (3mV typical, 10mV
MAX
)
Adjustable Output Common Mode Voltage
40dB Attenuation at 1.5
×
f
CUTOFF
Requires No External Components
The LTC
®
1566-1 is a 7th order continuous time lowpass
filter with 12dB of passband gain. The selectivity, linearity
and dynamic range makes the LTC1566-1 suitable for
filtering in data communications or data acquisition
systems. The filter attenuation is 40dB at 1.5
×
f
CUTOFF
and
at least 60dB for frequencies above 10MHz.
The LTC1566-1 has an input referred noise of 62µV
RMS
in
a 2MHz bandwidth. In receiver applications where the
signal levels are small, the filter features 71dB of spurious
free dynamic range.
With 5% accuracy of the cutoff frequency, the LTC1566-1
can be used in applications requiring pairs of matched
filters, such as transceiver I and Q channels.
The differential inputs and outputs provide a simple inter-
face for wireless systems. The high impedance inputs are
easily coupled to differential demodulators or D/A con-
verters. The output DC common mode voltage and output
DC offset voltage are adjustable so the signal path can be
optimized for driving an A/D converter or differential
modulator.
Other cutoff frequencies and single-ended I/O can be
provided upon request. Please contact LTC Marketing.
APPLICATIO S
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WCDMA Basestations
Communication Filters
Antialiasing Filters
Smoothing or Reconstruction Filters
Matched Filter Pairs
Replacement for LC Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Frequency Response
20
10
0
GAIN
1000
900
800
700
600
DELAY
500
400
300
200
100
0.1
1.0
10
FREQUENCY (MHz)
0
100
1566-1 G01
Single 5V Supply, Differential
2.3MHz Lowpass Filter
+
V
IN
–
2
IN
–
1
IN
+
LTC1566-1
OUT
–
7
OUT
+
8
+
V
OUT
–
–10
GAIN (dB)
–20
–30
–40
–50
3
10k
0.1µF
4
GND
V
+
6
10k
0.1µF
5V
–60
–70
–80
V
–
V
ODC
5
1566-1 TA01
U
DELAY (ns)
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U
1
LTC1566-1
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
IN
+
1
IN
–
2
GND 3
V
–
4
8 OUT
+
7 OUT
–
6 V
+
5 V
ODC
Total Supply Voltage ................................................ 11V
Power Dissipation .............................................. 500mW
Operating Temperature Range
LTC1566-1CS .......................................... 0°C to 70°C
LTC1566-1IS ...................................... – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1566-1CS8
LTC1566-1IS8
S8 PART MARKING
15661
15661I
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 80°C/W
(Note 4)
Consult factory for parts specified with wider operating temperature ranges.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
= 5V (V
+
= 5V, V
–
= 0V), R
LOAD
= 10k from each output to AC ground,
Pin 5 connected to Pin 3, Pin 3 biased to mid supply, unless otherwise specified.
PARAMETER
Filter Gain, V
S
= 5V
CONDITIONS
V
IN
= 0.25V
P-P
f
IN
= 20kHz to 100kHz
f
IN
= 1.8MHz (Gain Relative to 100kHz)
f
IN
= 2MHz (Gain Relative to 100kHz)
f
IN
= 2.3MHz (Gain Relative to 100kHz)
f
IN
= 3MHz (Gain Relative to 100kHz)
f
IN
= 5MHz (Gain Relative to 100kHz)
f
IN
= 10MHz (Gain Relative to 100kHz)
Filter Phase, V
S
=
±5V
Phase Linearity, V
S
=
±5V
Filter Gain, V
S
=
±5V
V
IN
= 0.25V
P-P
V
IN
= 0.25V
P-P
f
IN
= 900kHz
f
IN
= 1.8MHz
Ratio of phases: 1.8MHz/900kHz
f
IN
= 20kHz to 100kHz
f
IN
= 900kHz (Gain Relative to 100kHz)
f
IN
= 1.8MHz (Gain Relative to 100kHz)
f
IN
= 2MHz (Gain Relative to 100kHz)
f
IN
= 2.3MHz (Gain Relative to 100kHz)
f
IN
= 3MHz (Gain Relative to 100kHz)
f
IN
= 5MHz (Gain Relative to 100kHz)
f
IN
= 10MHz (Gain Relative to 100kHz)
Input Referred Wideband Noise
THD
Filter Differential DC Swing
Input Bias Current
Input Offset Current
Input Resistance
Input Capacitance
Output DC Offset
(Notes 3, 5)
V
S
= 5V
V
S
=
±5V
Common Mode, V
IN
= 1.5V to 3.5V
Differential
Noise BW = 50kHz to 2MHz
f
IN
= 100kHz, V
OUT
= 2V
P-P
(Note 2)
Maximum Difference Between Pins 7 and Pin 8
with Pin 5, Pin 3 Biased to Mid Supply
V
S
= 5V
V
S
=
±5V
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
11.8
–0.35
–0.85
–7.5
TYP
12.1
0
– 0.1
–3
– 22
– 42
– 62
–150
–285
1.95
12.1
0
0.1
0.1
–2
– 20
– 41
–61
62
80
MAX
12.3
0.8
0.8
–0.95
–17
UNITS
dB
dB
dB
dB
dB
dB
dB
deg
deg
dB
dB
dB
dB
dB
dB
dB
dB
µV
RMS
dB
V
P
V
P
●
●
●
●
●
●
●
●
●
–165
–330
1.9
11.9
–0.2
–0.3
–0.55
–6
–135
–265
2.05
12.3
0.2
0.9
0.75
–0.3
–16
±1.3
±2.7
±1.7
±2.9
300
±10
70
140
2
±3
±3
±10
±10
600
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2
U
nA
nA
MΩ
MΩ
pF
mV
mV
W
U
U
W W
W
LTC1566-1
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
= 5V (V
+
= 5V, V
–
= 0V), R
LOAD
= 10k from each output to AC ground,
and Pin 5 connected to Pin 3 unless otherwise specified
PARAMETER
Output DC Offset Drift
Output DC Common Mode Voltage
Power Supply Current
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Input and output voltages expressed as peak-to-peak numbers are
assumed to be fully differential.
Note 3:
Output DC offset is measured between Pin 8 and Pin 7 with Pin 1,
Pin 2 and Pin 5 connected to Pin 3. Pin 3 biased to mid supply.
V
S
= 5V, V
S
=
±2.5V
V
S
= 5V
V
S
=
±5V
●
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
V
S
= 5V
V
S
=
±5V
TYP
–160
–160
–80
24
25
MAX
UNITS
µV/°C
µV/°C
mV
32
34
mA
mA
Note 4:
Thermal resistance varies depending upon the amount of PC board
metal attached to the device.
θ
JA
is specified for a 3.8 square inch test
board covered with 2oz copper on both sides.
Note 5:
Output DC offset measurements are performed by automatic test
equipment approximately 0.5 seconds after application of power.
TYPICAL PERFOR A CE CHARACTERISTICS
Passband Gain and Delay
vs Frequency
12.4
T
A
= 25°C
GAIN
±5V
GAIN 5V
1
12.0
GAIN (dB)
11.2
DELAY
GAIN (dB)
GAIN (dB)
11.6
10.8
10.4
10k
100k
1M
FREQUENCY (Hz)
Stopband Gain vs Frequency
and Temperature
–10
V
S
= 5V
–20
V
OUT
(dBm)
GAIN (dB)
–30
V
OUT
(dBm)
T
A
= 25°C
–40
T
A
= –40, 85°C
–50
–60
3
4
5
6
7
8
FREQUENCY (MHz)
U W
1566-1 G02
Passband Gain
vs Frequency and Temperature
12.4
T
A
= –40°C
T
A
= 85°C
T
A
= 25°C
–10
Stopband Gain vs Frequency
T
A
= 25°C
12.0
–20
5V
±5V
11.6
–30
DELAY (µs)
11.2
–40
10.8
–50
0
5M
10.4
10k
–60
100k
1M
FREQUENCY (Hz)
5M
1566-1 G03
3
4
5
6
7
8
FREQUENCY (MHz)
9
10
1566-1 G04
450k/2M Intermodulation, V
S
= 5V
20
0
–20
–40
–60
–80
–100
–25
450k
1.55M
2M
2.45M
3.55M
NOISE FLOOR
1.1M
40
20
0
–20
–40
–60
OIP
3
= 38dBm
OIP
2
= 74dBm
0
–15
–10
–5
V
X
(dBm)
V
IN
= V
X
COS(2π • 450kHz) + V
X
COS (2π • 2MHz)
–20
1566-1 G06
500kHz Distortion
vs Input Level, V
S
= 5V
1dB COMPRESSION
500kHz
1MHz
1.5MHz
NOISE FLOOR
–80
–100
–25 –20
9
10
–15
–10 –5
V
IN
(dbm)
0
5
10
1566-1 G05
1566-1
G07
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LTC1566-1
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Temperature
23
SUPPLY CURRENT (mA)
V
S
=
±5V
CMRR (dB)
22
60
50
PSRR (dB)
V
S
= 5V
21
–50
–30
–10
10
30
50
TEMPERATURE (°C)
1566-1 G08
PI FU CTIO S
IN
+
, IN
–
(Pins 1, 2):
Input Pins. Signals can be applied to
either or both input pins. The DC gain from differential
inputs (Pin 1 to Pin 2) to the differential outputs (Pin 8 to
Pin 7) is 4V/V. The input range is described in the Applica-
tions Information section.
GND (Pin 3):
Ground. The ground pin is the reference
voltage for the filter. This is a high impedance input, which
requires an external biasing network. Biasing GND to
one-half the total power supply voltage of the filter maxi-
mizes the dynamic range. For single supply operation the
ground pin should be bypassed with a quality 0.1µF
ceramic capacitor to Pin 4. For dual supply operation,
connect Pin 3 to a high quality DC ground. A ground plane
should be used. A poor ground will increase noise and
distortion. Pin 3 also serves as the DC reference voltage for
Pin 7.
V
–
, V
+
(Pins 4, 6):
Power Supply Pins. For a single 5V
supply (Pin 4 grounded) a quality 0.1µF ceramic bypass
capacitor is required from the positive supply pin (Pin 6)
to the negative supply pin (Pin 4). The bypass should be
as close as possible to the IC. For dual supply applications
(Pin 3 is grounded), bypass Pin 6 to Pin 3 and Pin 4 to
Pin 3 with a quality 0.1µF ceramic capacitor.
V
ODC
(Pin 5):
Output DC Offset. Pin 5 is the DC reference
voltage for Pin 8. By applying a DC offset between Pin 3
and Pin 5, a DC offset will be added to the differential signal
between Pin 7 and Pin 8. Like the GND pin, the V
ODC
pin is
a high impedance which requires no bias current. Care
should be taken when biasing Pin 5 since noise between
Pin 3 and Pin 5 will appear at the filter output unattenuated.
The frequency response of Pin 5 is described in the
Applications Information section.
OUT
–
, OUT
+
(Pins 7, 8):
Output Pins. Pins 7 and 8 are the
filter differential outputs. Each pin can drive 1kΩ or 300pF
loads. The DC reference voltage of Pin 8 is the same as the
voltage at Pin 5. The DC reference voltage of Pin 7 is the
same as the voltage at Pin 3.
4
U W
70
Common Mode Rejection Ratio
90
80
70
50
Power Supply Rejection Ratio
70
V
IN
= 0.2V
P-P
V
S
= 5V
T
A
= 25°C
V
IN
= 1V
P-P
V
S
= 5V
T
A
= 25°C
60
40
40
30
30
20
90
1k
10k
100k
1M
FREQUENCY (Hz)
10M
1566-1 G09
1k
10k
100k
1M
FREQUENCY (Hz)
10M
1566-1 G10
U
U
U
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LTC1566-1
BLOCK DIAGRA
IN
+
1
+
1×
–
+
–
1×
IN
–
2
+
INPUT AMPLIFIERS
WITH COMMON MODE
TRANSLATION CIRCUIT
GND
V
–
3
UNITY GAIN OUTPUT
BUFFERS WITH DC
REFERENCE
ADJUSTMENT
4
APPLICATIO S I FOR ATIO
Interfacing to the LTC1566-1
The difference between the voltages at Pin 1 and Pin 2 is
the “differential input voltage.” The average of the voltages
at Pin 1 and Pin 2 is the “common mode input voltage.”
The difference between the voltages at Pin 7 and Pin 8 is
the “differential output voltage.” The average of the volt-
ages at Pin 7 and Pin 8 is the “common mode output
voltage.” The input and output common mode voltages
are independent. The input common mode voltage is set
by the signal source, if DC coupled, or by an external
1
IN
+
OUT
+
8
V
OUT+
V
OUT–
+
–
V
IN+
LTC1566-1
2
V
IN–
10k
IN
–
OUT
–
7
+
–
3
0.1µF
4
GND
V
+
6
10k
V
–
V
ODC
5
1566-1 F01
DC COUPLED INPUT
V
IN
(COMMON MODE) =
V
IN
+ + V
IN
–
2
V + + V
OUT
– = V+
V
OUT
(COMMON MODE) =
OUT
2
2
Figure 1
U
–
W
W
–
R
1×
8
OUT
+
+
R
7th ORDER
FILTER NETWORK
WITH 12dB GAIN
–
1×
7
OUT
–
+
6
V
+
5
1566-1 BD
V
ODC
U
U
biasing network, if AC coupled (Figures 1 and 2). The
output can also be AC coupled.
The output common mode voltage is equal to the voltage
of Pin 3, the GND pin, whenever Pin 5 is shorted to Pin 3.
In configurations where Pin 5, the V
ODC
pin, is not shorted
to Pin 3, the output common mode voltage is equal to the
average of the voltages at Pin 3 and Pin 5. The operation
of Pin 5 is described in the paragraph “Output DC Offset
Control”. Pin 3 is a high impedance pin and must be biased
externally with an external resistor network or reference
voltage.
0.1µF
1
IN
+
OUT
+
8
V
OUT+
V
OUT–
+
–
5V
0.1µF
V
IN+
0.1µF
100k
2
100k
3
10k
0.1µF
4
LTC1566-1
IN
–
OUT
–
7
V
IN–
+
–
GND
V
+
6
10k
5V
0.1µF
V
–
V
ODC
5
1566-1 F02
AC COUPLED INPUT
V
IN
(COMMON MODE) = V
OUT
(COMMON MODE) =
V+
2
Figure 2
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