outputs. It is designed for digitizing high frequency,
wide dynamic range signals. It is perfect for demanding
communications applications with AC performance that
includes 70dBFS SNR and 90dBFS spurious free dynamic
range (SFDR). The 1.25GHz input bandwidth allows the
ADC to under-sample high frequencies.
The JESD204B serial interface simplifies the PCB design by
minimizing the number of data lines required. At 170Msps,
only two 3.4Gbps output lanes are required. For sample
rates up to 150Msps, both ADCs may share the same
output lane at up to 6.0Gbps.
The DEVCLK
+
and DEVCLK
–
inputs can be driven differen-
tially with sine wave, PECL, or LVDS signals. An optional
clock divide-by-two circuit or clock duty cycle stabilizer
maintains high performance at full speed for a wide range
of clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
n
n
n
n
n
n
n
n
n
n
6.0Gbps JESD204B Interface
Only One Output Lane Required for Both ADCs
(F
S
≤ 150Msps)
70dBFS SNR
90dBFS SFDR
Low Power: 751mW Total
Single 1.8V Supply
Easy to Drive 1.5V
P-P
Input Range
1.25GHz Full Power Bandwidth S/H
Optional Clock Divide by Two
Optional Clock Duty Cycle Stabilizer
Low Power Sleep and Nap Modes
Serial SPI Port for Configuration
48-Lead (7mm
×
7mm) QFN Package
APPLICATIONS
n
n
n
n
n
n
Communications
Cellular Base Stations
Software Defined Radios
Medical Imaging
High Definition Video
Test and Measurement Instrumentation
TYPICAL APPLICATION
OV
DD
1.2V TO 1.9V
LTC2122
50
ANALOG
INPUT
JESD204B
LOGIC
50
0
SERIALIZER
3.4Gbps
–20
AMPLITUDE (dBFS)
–40
–60
–80
–100
–120
64k Point 2-Tone FFT,
f
IN
= 71MHz and 69MHz,
–7dBFS, 170Msps
14-BIT ADC
CLOCK
(170MHz OR
340MHz)
CLOCK
÷ 2 OR ÷ 1
PLL
OV
DD
1.2V TO 1.9V
JESD204B
FPGA OR ASIC
50
JESD204B
LOGIC
50
ANALOG
INPUT
14-BIT ADC
SERIALIZER
3.4Gbps
0
10
20
30
40
50
60
70
80
2122 TA01a
FREQUENCY (MHz)
2122 TA01
2122fb
For more information
www.linear.com/LTC2122
1
LTC2122
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
PIN CONFIGURATION
TOP VIEW
V
DD
GND
CS
SCK
SDI
SDO
OF
+
OF
–
GND
GND
V
DD
V
DD
48
47
46
45
44
43
42
41
40
39
38
37
Supply Voltages
V
DD
, OV
DD
...................................................... 0.3V to 2V
Analog Input Voltage
A
INA/B+
, A
INA/B –
....................... –0.3V to (V
DD
+ 0.2V)
SENSE (Note 3) ............................ –0.3V to (V
DD
+ 0.2V)
Digital Input Voltage
DEVCLK
+
, DEVCLK
–
, SYSREF
+
, SYSREF
–
,
SYNC~
+
, SYNC~
–
(Note 3) ....... –0.3V to (V
DD
+ 0.3V)
CS,
SDI, SCK (Note 4) .......................... –0.3V to 3.9V
SDO (Note 4) ............................................ –0.3V to 3.9V
Digital Output Voltage .................. –0.3V to (V
DD
+ 0.3V)
Operating Ambient Temperature Range
LTC2122C ................................................ 0°C to 70°C
LTC2122I ............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
V
DD
1
GND 2
A
INA+
3
A
INA–
4
SENSE 5
V
REF
6
V
CM
7
GND 8
A
INB–
9
A
INB+
10
GND 11
V
DD
12
49
GND
36
35
34
33
32
31
30
29
28
27
26
25
OV
DD
OV
DD
DNC
DNC
CMLOUT_A0
+
CMLOUT_A0
–
CMLOUT_B0
+
CMLOUT_B0
–
DNC
DNC
OV
DD
OV
DD
T
JMAX
= 150°C,
θ
JA
= 28°C/W
EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC2122CUK#PBF
LTC2122IUK#PBF
TAPE AND REEL
LTC2122CUK#TRPBF
LTC2122IUK#TRPBF
PART MARKING*
LTC2122UK
LTC2122UK
PACKAGE DESCRIPTION
48-Lead (7mm
×
7mm) Plastic QFN
48-Lead (7mm
×
7mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
V
DD
13
GND 14
DEVCLK
–
15
DEVCLK
+
16
GND 17
SYSREF
+
18
SYSREF
–
19
GND 20
SYNC~
+
21
SYNC~
–
22
V
DD
23
V
DD
24
UK PACKAGE
48-LEAD (7mm
×
7mm) PLASTIC QFN
2
2122fb
For more information
www.linear.com/LTC2122
LTC2122
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
Internal Reference
External Reference
Differential Analog Input (Note 6)
Differential Analog Input
(Note 7)
Internal Reference
External Reference
CONDITIONS
l
l
l
l
l
CONVERTER CHARACTERISTICS
The
l
denotes the specifications which apply over the full operating
MIN
14
–5.1
–0.9
–13
–4.0
±1.2
±0.35
±5
±1.5
±1
±20
±30
±10
1.82
5.1
0.9
13
2.2
TYP
MAX
UNITS
Bits
LSB
LSB
mV
%FS
%FS
µV/ºC
ppm/ºC
ppm/ºC
LSB
RMS
ANALOG INPUT
SYMBOL PARAMETER
V
IN
V
IN(CM)
V
SENSE
I
IN1
I
IN2
t
AP
t
JITTER
CMRR
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
1.7V < V
DD
< 1.9V
Differential Analog Input (Note 8)
0 < A
IN+
, A
IN–
< V
DD
, No Clock
1.2V < SENSE < 1.3V
l
l
l
l
l
MIN
V
CM
– 20mV
1.2
–1
–1
TYP
1.5
V
CM
1.250
MAX
V
CM
+ 20mV
1.3
1
1
UNITS
V
P-P
V
V
µA
µA
ns
ps
RMS
dB
MHz
Analog Input Range (A
IN+
– A
IN–
)
Analog Input Common Mode (A
IN+
+ A
IN–
)/2
Analog Input Leakage Current
SENSE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Jitter
Analog Input Common Mode Rejection Ratio
External Voltage Reference Applied to SENSE External Reference Mode
1
0.15
75
1250
BW–3dB Full-Power Bandwidth
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 5)
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
CONDITIONS
15MHz Input
70MHz Input
140MHz Input
15MHz Input
70MHz Input
140MHz Input
15MHz Input
70MHz Input
140MHz Input
15MHz Input
70MHz Input
140MHz Input
Up to 250MHz Input
MIN
TYP
70
69.8
69.1
90
85
80
95
95
85
69.9
69.4
68.5
–90
MAX
UNITS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dB
DYNAMIC ACCURACY
l
67.7
SFDR
Spurious Free Dynamic Range 2nd or 3rd
Harmonic
Spurious Free Dynamic Range 4th Harmonic
or Higher
l
76
l
83
S/(N+D)
Signal-to-Noise Plus Distortion Ratio
l
67.3
Crosstalk Crosstalk Between Channels
2122fb
For more information
www.linear.com/LTC2122
3
LTC2122
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Temperature Drift
V
CM
Output Resistance
V
REF
Output Voltage
V
REF
Output Temperature Drift
V
REF
Output Resistance
V
REF
Line Regulation
–400µA < I
OUT
< 1mA
1.7V < V
DD
< 1.9V
–1mA < I
OUT
< 1mA
I
OUT
= 0
1.225
CONDITIONS
I
OUT
= 0
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
MIN
0.435 •
V
DD
– 18mV
TYP
0.435 •
V
DD
±37
4
1.250
±30
7
0.6
1.275
MAX
0.435 •
V
DD
+ 18mV
UNITS
V
ppm/°C
Ω
V
ppm/°C
Ω
mV/V
POWER REQUIREMENTS
SYMBOL PARAMETER
V
DD
OV
DD
I
VDD
I
OVDD
P
DISS
P
SLEEP
P
NAP
Analog Supply Voltage
Output Supply Voltage
Analog Supply Current
Output Supply Current Per Lane
Power Dissipation
Sleep Mode Power
Nap Mode Power
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
Single-Lane Operation
Two-Lane Operation
CML Current = 16mA, Directly Terminated (Note 8)
CML Current = 16mA, AC Terminated
CML Current = 12mA
V
DD
= 1.8V, Excluding OV
DD
Power
l
l
l
l
l
l
l
MIN
1.8
1.7
1.2
1.4
TYP
1.85
1.8
MAX
1.9
1.9
1.9
1.9
UNITS
V
V
V
V
mA
mA
mW
mW
mW
417
11
12
751
2
433
459
13.8
826
DIGITAL INPUTS AND OUTPUTS
SYMBOL
V
ID
V
ICM
R
IN
C
IN
V
ID
V
ICM
R
IN
C
IN
PARAMETER
Differential Input Voltage
Common Mode Input Voltage
Input Resistance
Input Capacitance
Differential Input Voltage
Common Mode Input Voltage
Input Resistance
Input Capacitance
CLOCK INPUTS (DEVCLK
+
, DEVCLK
–
)
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
(Note 8)
Internally Set
Externally Set (Note 8)
(See Figure 2)
l
l
MIN
0.2
1.1
TYP
MAX
UNITS
V
1.2
10
2
1.5
V
V
kΩ
pF
V
Differential Digital Inputs (SYNC~
+
, SYNC~
–
, SYSREF
+
, SYSREF
–
)
(Note 8)
Internally Set
Externally Set (Note 8)
l
l
0.2
1.1
1.2
6.7
2
1.5
V
V
kΩ
pF
4
2122fb
For more information
www.linear.com/LTC2122
LTC2122
DIGITAL INPUTS AND OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
R
OL
I
OH
C
OUT
V
OD
V
OS
V
DIFF
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
Logic Low Output Resistance to GND
Logic High Output Leakage Current
Output Capacitance
Differential Output Voltage
Common Mode Output Voltage
CML Differential Output Voltage
Output Current Set to 10mA
Output Current Set to 12mA
Output Current Set to 14mA
Output Current Set to 16mA
Directly-Coupled 50Ω to OV
DD
Directly-Coupled 100Ω Differential
AC-Coupled
Directly-Coupled 50Ω to OV
DD
Directly-Coupled 100Ω Differential
AC-Coupled
Directly-Coupled 50Ω to OV
DD
Directly-Coupled 100Ω Differential
AC-Coupled
Single-Ended
Differential
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
V
DD
= 1.8V
V
DD
= 1.8V
V
IN
= 0V to 3.6V
(Note 8)
V
DD
= 1.8V, SDO = 0V
SDO = 0V to 3.6V
(Note 8)
100Ω Differential Load
l
l
l
l
l
l
MIN
1.3
TYP
MAX
UNITS
V
DIGITAL INPUTS (CS, SDI, SCK)
0.6
–10
3
200
–10
4
247
1.125
350
1.25
500
600
700
800
OV
DD
OV
DD
-1/4 V
DIFF
OV
DD
-1/4 V
DIFF
OV
DD
-1/2 V
DIFF
OV
DD
-3/4 V
DIFF
OV
DD
-3/4 V
DIFF
OV
DD
-1/4 V
DIFF
OV
DD
-1/2 V
DIFF
OV
DD
-1/2 V
DIFF
80
50
100
120
454
1.375
10
10
V
µA
pF
Ω
µA
pF
mV
V
mVppd
mVppd
mVppd
mVppd
V
V
V
V
V
V
V
V
V
Ω
Ω
SDO OUTPUT (Open-Drain Output. Requires 2k Pull-Up Resistor if SDO Is Used)
LVDS OUTPUTS (OF
+
, OF
–
)
CML Outputs
V
OH
V
OL
V
OCM
R
OUT
Output High Level
Output Low Level
Output Common Mode Level
Output Resistance
TIMING CHARACTERISTICS
SYMBOL
f
S
, 1/t
S
t
L
t
H
t
DCK
PARAMETER
Sampling Frequency
1× CLK Low Time (Note 8)
1× CLK High Time (Note 8)
DEVCLK Period
The
l
denotes the specifications which apply over the full operating temperature
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