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LTC2257IUJ-12#TRPBF

Description
1-Channel Single ADC Pipelined 40Msps 12-bit Parallel 40-Pin QFN EP T/R
File Size963KB,34 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric View All

LTC2257IUJ-12#TRPBF Overview

1-Channel Single ADC Pipelined 40Msps 12-bit Parallel 40-Pin QFN EP T/R

LTC2257IUJ-12#TRPBF Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)EAR99
Part StatusActive
Converter TypeGeneral Purpose
ArchitecturePipelined
Resolution12bit
Number of ADCs1
Number of Input Channels1
Sampling Rate40Msps
Digital Interface TypeParallel
Input TypeVoltage
Input Signal TypeDifferential
Voltage ReferenceInternal|External
Voltage Supply SourceSingle
Input Voltage1Vp-p/2Vp-p
Minimum Single Supply Voltage (V)1.7
Typical Single Supply Voltage (V)1.8
Maximum Single Supply Voltage (V)1.9
Typical Power Dissipation (mW)121.1
Maximum Power Dissipation (mW)135
Integral Nonlinearity Error±1LSB
Full Scale Error±1.5%FSR
Signal to Noise Ratio70.8dB(Typ)
No Missing Codes (bit)12
Sample and HoldYes
Single-Ended InputNo
Digital Supply SupportNo
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)85
PackagingTape and Reel
Supplier Temperature GradeIndustrial
Supplier PackageQFN EP
Pin Count40
Standard Package NameQFN
MountingSurface Mount
Package Height0.75(Max)
Package Length6
Package Width6
PCB changed40
Lead ShapeNo Lead
LTC2258-12
LTC2257-12/LTC2256-12
12-Bit, 65/40/25Msps
Ultralow Power 1.8V ADCs
FeaTures
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n
n
n
n
n
n
n
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DescripTion
The
LTC
®
2258-12/LTC2257-12/LTC2256-12
are sam-
pling 12-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performance that includes 71.1dB SNR and 88dB spurious
free dynamic range (SFDR). Ultralow jitter of 0.17ps
RMS
allows undersampling of IF frequencies with excellent
noise performance.
DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL
(typical) and no missing codes over temperature. The
transition noise is a low 0.3LSB
RMS
.
The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
71.1dB SNR
88dB SFDR
Low Power: 79mW/47mW/34mW
Single 1.8V Supply
CMOS, DDR CMOS or DDR LVDS Outputs
Selectable Input Ranges: 1V
P-P
to 2V
P-P
800MHz Full-Power Bandwidth S/H
Optional Data Output Randomizer
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Serial SPI Port for Configuration
Pin Compatible 14-Bit and 12-Bit Versions
40-Pin (6mm × 6mm) QFN Package
applicaTions
n
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Communications
Cellular Base Stations
Software Defined Radios
Portable Medical Imaging
Multi-Channel Data Acquisition
Nondestructive Testing
Typical applicaTion
1.8V
V
DD
1.2V
TO 1.8V
OV
DD
LTC2258-12 2-Tone FFT,
f
IN
= 68MHz and 69MHz
0
–10
–20
–30
AMPLITUDE (dBFS)
–40
–50
–60
–70
–80
ANALOG
INPUT
+
INPUT
S/H
12-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
D11
CMOS
OR
LVDS
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
65MHz
CLOCK
GND
225812 TA01a
–90
–100
–110
–120
0
20
10
FREQUENCY (MHz)
30
225812 TA01b
225812fd
For more information
www.linear.com/LTC2258-12
1

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