EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
F PACKAGE
20-LEAD PLASTIC TSSOP
T
JMAX
= 150°C, θ
JA
= 90°C/W, θ
JC
= 20°C/W
ORDeR InFORMAtIOn
LEAD FREE FINISH
LTC2309CUF#PBF
LTC2309IUF#PBF
LTC2309CF#PBF
LTC2309IF#PBF
LTC2309HF#PBF
TAPE AND REEL
LTC2309CUF#TRPBF
LTC2309IUF#TRPBF
LTC2309CF#TRPBF
LTC2309IF#TRPBF
LTC2309HF#TRPBF
PART MARKING*
2309
2309
LTC2309F
LTC2309F
LTC2309F
PACKAGE DESCRIPTION
24-Lead (4mm × 4mm) Plastic QFN
24-Lead (4mm × 4mm) Plastic QFN
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2309fd
LTC2309
COnVeRteR AnD MuLtIpLexeR CHARACteRIstICs
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Bipolar Zero Error
Bipolar Zero Error Drift
Bipolar Zero Error Match
Unipolar Zero Error
Unipolar Zero Error Drift
Unipolar Zero Error Match
Bipolar Full-Scale Error
Bipolar Full-Scale Error Drift
Bipolar Full-Scale Error Match
Unipolar Full-Scale Error
CONDITIONS
l
The
l
denotes the specifications
which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C. (Notes 4, 5)
MIN
12
TYP
±0.45
±0.35
±1
0.002
±0.1
±0.4
0.002
±0.2
±0.5
±0.4
0.05
±0.4
±0.4
±0.5
±0.3
0.05
±0.3
MAX
±1
±1
±8
±3
±6
±1
±10
±9
±3
±10
±12
±6
±2
UNITS
Bits
LSB
LSB
LSB
LSB/°C
LSB
LSB
LSB/°C
LSB
LSB
LSB
LSB/°C
LSB
LSB
LSB
LSB
LSB/°C
LSB
(Note 6)
(Note 7)
l
l
l
(Note 7)
l
External Reference (Note 8)
REFCOMP = 4.096V
External Reference
QFN External Reference (Note 8)
TSSOP External Reference (Note 8)
REFCOMP = 4.096V
External Reference
l
l
l
l
l
Unipolar Full-Scale Error Drift
Unipolar Full-Scale Error Match
AnALOG Input
SYMBOL
V
IN+
V
IN–
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
PARAMETER
Absolute Input Range (CH0 to CH7)
Absolute Input Range (CH0 to CH7, COM)
CONDITIONS
(Note 9)
Unipolar (Note 9)
Bipolar (Note 9)
V
IN
= V
IN+
– V
IN–
(Unipolar)
V
IN
= V
IN+
– V
IN–
(Bipolar)
Sample Mode
Hold Mode
l
l
l
l
l
l
V
IN+
– V
IN–
Input Differential Voltage Range
I
IN
C
IN
CMRR
Analog Input Leakage Current
Analog Input Capacitance
Input Common Mode Rejection Ratio
MIN
–0.05
–0.05
–0.05
TYP
MAX
REFCOMP
0.25 • REFCOMP
0.75 • REFCOMP
0 to REFCOMP
±REFCOMP/2
±1
55
5
70
UNITS
V
V
V
V
V
µA
pF
pF
dB
DYnAMIC ACCuRACY
SYMBOL
SINAD
SNR
THD
SFDR
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Notes 4, 10)
PARAMETER
Signal-to-(Noise + Distortion) Ratio
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range
Channel-to-Channel Isolation
Full Linear Bandwidth
–3dB Input Linear Bandwidth
Aperture Delay
Transient Response
CONDITIONS
f
IN
= 1kHz
f
IN
= 1kHz
f
IN
= 1kHz, First 5 Harmonics
f
IN
= 1kHz
f
IN
= 1kHz
(Note 11)
l
l
l
l
MIN
71
71
79
Full-Scale Step
TYP
73.3
73.4
–88
90
–109
700
25
13
240
MAX
–77
UNITS
dB
dB
dB
dB
dB
kHz
MHz
ns
ns
2309fd
LTC2309
InteRnAL ReFeRenCe CHARACteRIstICs
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Output Impedance
V
REFCOMP
Output Voltage
V
REF
Line Regulation
CONDITIONS
I
OUT
= 0 (QFN)
I
OUT
= 0 (TSSOP)
I
OUT
= 0
–0.1mA ≤ I
OUT
≤ 0.1mA
I
OUT
= 0
V
DD
= 4.75V to 5.25V
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
l
l
MIN
2.47
2.46
TYP
2.50
2.50
±25
8
4.096
0.8
MAX
2.53
2.54
UNITS
V
V
ppm/°C
kΩ
V
mV/V
I
2
C Inputs AnD DIGItAL Outputs
SYMBOL
V
IH
V
IL
V
IHA
V
ILA
R
INH
R
INL
R
INF
I
I
V
HYS
V
OL
t
OF
t
SP
C
CAX
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Voltage for Address Pins A1, A0
Low Level Input Voltage for Address Pins A1, A0
Resistance from A1, A0, to V
DD
to Set Chip
Address Bit to 1
Resistance from A1, A0 to GND to Set Chip
Address Bit to 0
Resistance from A1, A0 to GND or V
DD
to Set
Chip Address Bit to Float
Digital Input Current
Hysteresis of Schmitt Trigger Inputs
Low Level Output Voltage (SDA)
Output Fall Time V
H
to V
IL(MAX)
Input Spike Suppression
External Capacitance Load On-Chip Address Pins
(A1, A0) for Valid Float
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
l
l
l
l
l
l
l
MIN
2.85
4.75
TYP
MAX
1.5
0.25
10
10
UNITS
V
V
V
V
kΩ
kΩ
MΩ
2
–10
0.25
20 + 0.1C
B
10
0.4
250
50
10
V
IN
= V
DD
(Note 9)
I = 3mA
(Note 12)
l
l
l
l
l
l
µA
V
V
ns
ns
pF
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
V
DD
I
DD
PARAMETER
Supply Voltage
Supply Current
Nap Mode
Sleep Mode
Power Dissipation
Nap Mode
Sleep Mode
CONDITIONS
pOWeR ReQuIReMents
The
l
denotes the specifications which apply over the full operating temperature
l
MIN
4.75
P
D
14ksps Sample Rate
SLP Bit = 0, Conversion Done
SLP Bit = 1, Conversion Done
14ksps Sample Rate
SLP Bit = 0, Conversion Done
SLP Bit = 1, Conversion Done
l
l
l
l
l
l
TYP
5
2.3
210
7
11.5
1.05
35
MAX
5.25
3
350
15
15
1.75
75
UNITS
V
mA
µA
µA
mW
mW
µW
2309fd
LTC2309
I
2
C tIMInG CHARACteRIstICs
SYMBOL
f
SCL
t
HD(SDA)
t
LOW
t
HIGH
t
SU(STA)
t
HD(DAT)
t
SU(DAT)
t
r
t
f
t
SU(STO)
t
BUF
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
PARAMETER
CONDITIONS
SCL Clock Frequency
Hold Time (Repeated) START Condition
LOW Period of the SCL Pin
HIGH Period of the SCL Pin
Set-Up Time for a Repeated START Condition
Data Hold Time
Data Set-Up Time
Rise Time for SDA/SCL Signals
(Note 12)
Fall Time for SDA/SCL Signals
(Note 12)
Set-Up Time for STOP Condition
Bus Free Time Between a STOP and START Condition
MIN
l
l
l
l
l
l
l
l
l
l
l
TYP
MAX
400
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
1.3
0.9
300
300
UNITS
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
ADC tIMInG CHARACteRIstICs
SYMBOL
f
SMPL
t
CONV
t
ACQ
t
REFWAKE
PARAMETER
Throughput Rate (Successive Reads)
Conversion Time
Acquisition Time
REFCOMP Wake-Up Time (Note 13)
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
l
MIN
l
l
TYP
1.3
200
(Note 9)
(Note 9)
C
REFCOMP
= 10µF
REF
= 2.2µF
, C
MAX
14
1.8
240
UNITS
ksps
µs
ns
ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground.
Note 3: When these pin voltages are taken below ground or above V
DD
,
they will be clamped by internal diodes. These products can handle input
currents greater than 100mA below ground or above V
DD
without latchup.
Note 4: V
DD
= 5V, f
SMPL
= 14ksps internal reference unless otherwise
noted.
Note 5: Linearity, offset and full-scale specifications apply for a
single-ended analog input with respect to COM.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: Bipolar zero error is the offset voltage measured from –0.5LSB
when the output code flickers between 0000 0000 0000 and 1111 1111
1111. Unipolar zero error is the offset voltage measured from +0.5LSB
when the output code flickers between 0000 0000 0000 and 0000 0000
0001.
Note 8: Full-scale bipolar error is the worst-case of –FS or +FS untrimmed
deviation from ideal first and last code transitions and includes the effect
of offset error. Unipolar full-scale error is the deviation of the last code
transition from ideal and includes the effect of offset error.
Note 9: Guaranteed by design, not subject to test.
Note 10: All specifications in dB are referred to a full-scale ±2.048V input
with a 2.5V reference voltage.
Note 11: Full linear bandwidth is defined as the full-scale input frequency
at which the SINAD degrades to 60dB or 10 bits of accuracy.
Note 12: C
B
= capacitance of one bus line in pF (10pF ≤ C
B
≤ 400pF).
Note 13: REFCOMP wake-up time is the time required for the REFCOMP
pin to settle within 0.5LSB at 12-bit resolution of its final value after
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