Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/.
Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C (Note 4).
SYMBOL
V
IN+
V
IN–
V
IN+
– V
IN–
V
CM
I
IN
C
IN
CMRR
I
REFOUT
PARAMETER
Absolute Input Range (A
IN1+
, A
IN2+
)
Absolute Input Range (A
IN1–
, A
IN2–
)
Input Differential Voltage Range
Common Mode Input Range
Analog Input DC Leakage Current
Analog Input Capacitance
Input Common Mode Rejection Ratio
External Reference Current
f
IN
= 2.2MHz
REFINT = 0V, REFOUT = 4.096V
CONDITIONS
(Note 5)
(Note 5)
V
IN
= V
IN+
– V
IN–
V
IN
= (V
IN+
+ V
IN–
)/2
l
l
l
l
l
ELECTRICAL CHARACTERISTICS
MIN
0
0
–REFOUT1,2
0
–1
TYP
OGND
MAX
V
DD
V
DD
REFOUT1,2
V
DD
1
UNITS
V
V
V
V
µA
pF
dB
µA
232314fb
10
85
675
2
For more information
www.linear.com/LTC2323-14
LTC2323-14
temperature range, otherwise specifications are at T
A
= 25°C (Notes 4, 16).
SYMBOL PARAMETER
Resolution
No Missing Codes
Transition Noise
INL
DNL
BZE
FSE
Integral Linearity Error
Differential Linearity Error
Bipolar Zero-Scale Error
Bipolar Zero-Scale Error Drift
Bipolar Full-Scale Error
Bipolar Full-Scale Error Drift
V
REFOUT1,2
= 4.096V (REFINT Grounded) (Note 7)
V
REFOUT1,2
= 4.096V (REFINT Grounded)
l
CONVERTER CHARACTERISTICS
The
l
denotes the specifications which apply over the full operating
CONDITIONS
l
l
MIN
14
14
TYP
MAX
UNITS
Bits
Bits
0.4
(Note 6)
(Note 7)
l
l
l
LSB
RMS
4
0.99
5
50
LSB
LSB
LSB
LSB/°C
LSB
ppm/°C
–4
–0.99
–5
50
±1
±0.4
0
0.006
±3
15
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C and A
IN
= –1dBFS (Notes 4, 8).
SYMBOL PARAMETER
SINAD
SNR
THD
SFDR
CONDITIONS
l
DYNAMIC ACCURACY
MIN
72.8
73
TYP
79
79
80
80.5
–85
–86
MAX
UNITS
dB
dB
dB
dB
Signal-to-(Noise + Distortion) Ratio f
IN
= 2.2MHz, V
REFOUT1,2
= 4.096V, Internal Reference
f
IN
= 2.2MHz, V
REFOUT1,2
= 5V, External Reference
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range
–3dB Input Linear Bandwidth
Aperture Delay
Aperture Delay Matching
Aperture Jitter
Transient Response
Full-Scale Step
f
IN
= 2.2MHz, V
REFOUT1,2
= 4.096V, Internal Reference
f
IN
= 2.2MHz, V
REFOUT1,2
= 5V, External Reference
f
IN
= 2.2MHz, V
REFOUT1,2
= 4.096V, Internal Reference
f
IN
= 2.2MHz, V
REFOUT1,2
= 5V, External Reference
f
IN
= 2.2MHz, V
REFOUT1,2
= 4.096V, Internal Reference
f
IN
= 2.2MHz, V
REFOUT1,2
= 5V, External Reference
l
l
–80
dB
dB
dB
dB
MHz
ps
ps
ps
RMS
ns
l
80
88
88
10
500
500
1
3
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C (Note 4).
SYMBOL
V
REFOUT1,2
PARAMETER
Internal Reference Output Voltage
V
REFOUT1,2
Temperature Coefficient
REFOUT1,2 Output Impedance
V
REFOUT1,2
Line Regulation
V
DD
= 4.75V to 5.25V
CONDITIONS
4.75V < V
DD
< 5.25V
3.13V < V
DD
< 3.47V
(Note 14)
l
l
l
INTERNAL REFERENCE CHARACTERISTICS
MIN
4.088
2.044
TYP
4.096
2.048
3
0.25
0.3
MAX
4.106
2.053
20
UNITS
V
V
ppm/°C
Ω
mV/V
232314fb
For more information
http://www.linear.com/LTC2323-14
3
LTC2323-14
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C (Note 4).
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
OZ
I
SOURCE
I
SINK
V
ID
V
IS
V
OD
V
OS
V
OD_LP
V
OS_LP
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage Current
Output Source Current
Output Sink Current
LVDS Differential Input Voltage
LVDS Common Mode Input Voltage
LVDS Differential Output Voltage
LVDS Common Mode Output Voltage
Low Power LVDS Differential Output
Voltage
Low Power LVDS Common Mode
Output Voltage
I
O
= -500µA
I
O
= 500µA
V
OUT
= 0V to OV
DD
V
OUT
= 0V
V
OUT
= OV
DD
100Ω Differential Termination, OV
DD
= 2.5V
100Ω Differential Termination, OV
DD
= 2.5V
100Ω Differential Load, LVDS Mode,
OV
DD
= 2.5V
100Ω Differential Load, LVDS Mode,
OV
DD
= 2.5V
100Ω Differential Load, Low Power,
LVDS Mode ,OV
DD
= 2.5V
100Ω Differential Load, Low Power,
LVDS Mode ,OV
DD
= 2.5V
l
l
l
l
l
l
l
l
l
DIGITAL INPUTS AND DIGITAL OUTPUTS
CONDITIONS
MIN
l
l
TYP
MAX
0.2 • OV
DD
UNITS
V
V
μA
pF
V
0.8 • OV
DD
–10
5
OV
DD
– 0.2
0.2
–10
–10
10
240
1
100
0.85
75
0.9
150
1.2
100
1.2
600
1.45
300
1.4
250
1.4
10
10
V
IN
= 0V to OV
DD
l
V
µA
mA
mA
mV
V
mV
V
mV
V
POWER REQUIREMENTS
SYMBOL PARAMETER
V
DD
OV
DD
I
VDD
I
OVDD
I
NAP
I
SLEEP
P
D_3.3V
Supply Voltage
Supply Voltage
Supply Current
Supply Current
Nap Mode Current
Sleep Mode Current
Power Dissipation
Nap Mode
Sleep Mode
P
D_5V
Power Dissipation
Nap Mode
Sleep Mode
CONDITIONS
5V Operation
3.3V Operation
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C (Note 4).
MIN
l
l
l
TYP
MAX
5.25
3.47
2.63
UNITS
V
V
V
mA
mA
mA
mA
μA
μA
mW
mW
mW
mW
μW
μW
mW
mW
mW
mW
μW
μW
232314fb
4.75
3.13
1.71
14.5
2.8
9.5
2.85
1
1
55
72
9
32
5
5
76
105
15
38
5
5
5Msps Sample Rate (IN
+
= IN
–
= 0V)
5Msps Sample Rate (C
L
= 5pF)
5Msps Sample Rate (R
L
= 100Ω)
Conversion Done (I
VDD
)
Sleep Mode (I
VDD
+ I
OVDD
)
Sleep Mode (I
VDD
+ I
OVDD
)
CMOS Mode
LVDS Mode
CMOS Mode
LVDS Mode
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
18
5
12
5
5
5
58
86
13
41
16.5
16.5
100
110
25
40
25
25
V
DD
= 3.3V 5Msps Sample Rate (IN
+
= IN
–
= 0V) CMOS Mode
V
DD
= 3.3V 5Msps Sample Rate (IN
+
= IN
–
= 0V) LVDS Mode
V
DD
= 3.3V Conversion Done (I
VDD
+ I
OVDD
)
V
DD
= 3.3V Conversion Done (I
VDD
+ I
OVDD
)
V
DD
= 3.3V Sleep Mode (I
VDD
+ I
OVDD
)
V
DD
= 3.3V Sleep Mode (I
VDD
+ I
OVDD
)
CMOS Mode
LVDS Mode
CMOS Mode
LVDS Mode
V
DD
= 5V 5Msps Sample Rate (IN
+
= IN
–
= 0V) CMOS Mode
V
DD
= 5V 5Msps Sample Rate (IN
+
= IN
–
= 0V) LVDS Mode
V
DD
= 5V Conversion Done (I
VDD
+ I
OVDD
)
V
DD
= 5V Conversion Done (I
VDD
+ I
OVDD
)
V
DD
= 5V Sleep Mode (I
VDD
+ I
OVDD
)
V
DD
= 5V Sleep Mode (I
VDD
+ I
OVDD
)
CMOS Mode
LVDS Mode
CMOS Mode
LVDS Mode
4
For more information
www.linear.com/LTC2323-14
LTC2323-14
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C (Note 4).
SYMBOL
f
SMPL
t
CYC
t
CONV
t
CNVH
t
DCNVSCKL
t
DSCKLCNVH
t
SCK
t
SCKH
t
SCKL
t
DSCKCLKOUT
t
DCLKOUTSDOV
t
HSDO
t
DCNVSDOV
t
DCNVSDOZ
t
WAKE
PARAMETER
Maximum Sampling Frequency
Time Between Conversions
Conversion Time
CNV
High Time
SCK Quiet Time from
CNV↓
SCK Delay Time to
CNV↑
SCK Period
SCK High Time
SCK Low Time
SCK to CLKOUT Delay
SDO Data Valid Delay from CLKOUT↓
SDO Data Remains Valid Delay from
CLKOUT↓
SDO Data Valid Delay from
CNV↓
Bus Relinquish Time After
CNV↑
REFOUT1,2 Wake-Up Time
(Note 12)
C
L
= 5pF (Note 12)
C
L
= 5pF (Note 11)
C
L
= 5pF (Note 11)
(Note 11)
C
REFOUT1,2
= 10μF
(Note 11)
(Note 11)
(Notes 12, 13)
CONDITIONS
l
l
l
l
l
l
l
l
l
l
l
l
l
l
ADC TIMING CHARACTERISTICS
MIN
200
171.5
25
9.5
19.1
9.4
4
4
2.8
TYP
MAX
5
1000000
UNITS
Msps
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
2
2.5
10
3
3
ns
ns
ns
ns
ms
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground.
Note 3:
When these pin voltages are taken below ground, or above V
DD
or OV
DD
, they will be clamped by internal diodes. This product can handle
input currents up to 100mA below ground, or above V
DD
or OV
DD
, without
latch-up.
Note 4:
V
DD
= 5V, OV
DD
= 2.5V, REFOUT1,2 = 4.096V, f
SMPL
= 5MHz.
Note 5:
Recommended operating conditions.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7:
Bipolar zero error is the offset voltage measured from –0.5LSB
when the output code flickers between 000 0000 0000 0000 and 111
1111 1111 1111. Full-scale bipolar error is the worst-case of –FS or +FS
untrimmed deviation from ideal first and last code transitions and includes
the effect of offset error.
Note 8:
All specifications in dB are referred to a full-scale ±4.096V input
with REFIN = 4.096V.
Note 9:
When REFOUT1,2 is overdriven, the internal reference buffer must
be turned off by setting REFINT = 0V.
Note 10:
f
SMPL
= 5MHz, I
REFBUF
varies proportionally with sample rate.
Note 11:
Guaranteed by design, not subject to test.
Note 12:
Parameter tested and guaranteed at OV
DD
= 1.71V and
OV
DD
= 2.5V.
Note 13:
t
SCK
of 9.4ns maximum allows a shift clock frequency up to
105MHz for rising edge capture.
Note 14:
Temperature coefficient is calculated by dividing the maximum
change in output voltage by the specified temperature range.
Note 15:
CNV
is driven from a low jitter digital source, typically at OV
DD
logic levels. This input pin has a TTL style input that will draw a small
amount of current.
Note 16:
1LSB = 2 • REFOUT1,2/2
14
0.8 • OV
DD
0.2 • OV
DD
t
DELAY
0.8 • OV
DD
0.2 • OV
DD
t
DELAY
0.8 • OV
DD
0.2 • OV
DD
50%
t
WIDTH
50%
232314 F01
Figure 1. Voltage Levels for Timing Specifications
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