Modes of Operation .............................................................................................................................................. 16
Data Acquisition Channels .................................................................................................................................... 17
Power Measurement ............................................................................................................................................. 20
Charge, Energy and Time ...................................................................................................................................... 21
SERIAL INTERFACES ............................................................................................................23
Serial Interfaces Overview .................................................................................................................................... 23
4-Wire Serial Peripheral Interface (SPI) Physical Layer ........................................................................................ 23
Data Link Layer ..................................................................................................................................................... 29
Temperature Measurement .................................................................................................................................. 69
Application Information .........................................................................................................69
Sense Resistor Temperature Compensation ......................................................................................................... 70
Current and Voltage Input Filtering ....................................................................................................................... 75
Powering the LTC2949 ......................................................................................................................................... 76
BYP1 (Note 4) ......................................... –10mA to 0mA
BYP2 (Note 4) ......................................... –10mA to 0mA
Operating Ambient Temperature Range
LTC2949I .................................................–40°C to 85°C
LTC2949H .............................................. –40°C to 125°C
Storage Temperature Range….... ........... –65°C to 150°C
49
GND
36
35
34
33
32
31
30
29
28
27
26
25
DNC
VREF
CLKO
CLKI
DNC
DNC
CSB (IM)
SCK (IP)
SDO (IBIAS)
SDI (ICMP)
IOVCC
BYP2
LXE PACKAGE
48-LEAD (7mm
×
7mm) PLASTIC LQFP
DNC: DO NOT CONNECT
T
JMAX
= 150°C,
θ
JA
= 20.46°C/W,
θ
JC
= 3.68°C/W
EXPOSED PAD (PIN 49), CONNECT TO AGND
ORDER INFORMATION
AUTOMOTIVE PRODUCTS**
TRAY (250PC)
LTC2949ILXE#3ZZPBF
LTC2949HLXE#3ZZPBF
TAPE AND REEL (2000PC) PART MARKING*
LTC2949ILXE#3ZZTRPBF
LTC2949LXE
LTC2949HLXE#3ZZTRPBF LTC2949LXE
PACKAGE DESCRIPTION
48-LEAD PLASTIC eLQFP
48-LEAD PLASTIC eLQFP
MSL RATING TEMPERATURE RANGE
3
3
–40°C to 85°C
–40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications.
Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #3ZZ suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local
Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.
V12 13
SCL 14
SDA 15
BYP1 16
DGND 17
AGND 18
AVCC 19
DVCC 20
DNC 21
DNC 22
DNC 23
DNC 24
Rev 0
For more information
www.analog.com
3
LTC2949
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C.
SYMBOL
V
AVCC
V
DVCC
V
UVLO
I
CC
PARAMETER
Analog Supply Voltage
Digital Supply Voltage
Supply Undervoltage Lockout Threshold
Average Supply Current into AVCC and DVCC
V
AVCC
, V
DVCC
Falling
Core State: STANDBY or MEASURE
Core State: SLEEP
Core State: SLEEP
Additional DVCC Supply Current if isoSPI in
READY/ACTIVE States
R
B1
+ R
B2
= 2k
READY
ACTIVE
READY
ACTIVE
l
l
l
l
l
l
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
l
l
l
l
MIN
4.5
4.5
TYP
MAX
14
14
4.5
UNITS
V
V
V
mA
µA
µA
mA
mA
mA
mA
V
mA
mV
V
V
mA
mV
°C
Bit
Bit
Bit
Power Supply
16
8
4.8
6.1
2.1
2.5
2.25
–10
–15
3
–10
–60
170
3.25
2.5
20
15
150
5.8
7.8
3
3.5
2.75
0
0
2.25
3.6
0
Note: ACTIVE State Current Assumes t
CLK
= 1μs,
R
B1
+ R
B2
= 20k
(Note 5)
V
BYP1
BYP1 Regulated Output Voltage
BYP1 Load Current
BYP1 Load Regulation Error
BYP1 Undervoltage Lockout Threshold
V
BYP2
BYP2 Regulation Output Voltage
BYP2 Load Current
BYP2 Load Regulation Error
Thermal Shutdown Temperature
Current Sense ADC
Resolution (No Missing Codes)
I
LOAD
= –10mA
I
LOAD
= –10mA
l
l
l
l
l
Slow Mode Filtered (Note 7)
Slow Mode (Note 7)
Fast Mode (Note 7)
l
l
l
20
18
15
±124
±110
–0.11
237.5
950
7.60371
V
AVCC
+0.11
Full-Scale Differential Input Voltage
VDIF
I
Differential Input Voltage Range
Pin Voltage of I1P, I1M, I2P, I2M
Current Sense Quantization Step
V
I1P
-V
I1M
, V
I2P
-V
I2M
V
I1P
-V
I1M
, V
I2P
-V
I2M
Slow Mode Filtered
Slow Mode
Fast Mode
l
l
mV
mV
V
nV
nV
µV
40
nA
µA
CFPx
Input Leakage Current at CF1P, CF1M, I1P,
I1M, CF2P, CF2M, I2P, I2M
Differential Input Current from CF1P to CF1M,
CF2P to CF2M
Noise
Core State = SLEEP/STANDBY
Core State: MEASURE; Pin Voltages: 0V ≤
V
CF1P
, V
CF1M
, V
I1P
, V
I1M
, V
CF2P
, V
CF2M
,
V
I2P
, V
I2M
≤ V
AVCC
Slow Mode Filtered
Slow Mode
Fast Mode
l
VDIF
I
/100kΩ
160
320
3
0.15
l
nV
RMS
nV
RMS
µV
RMS
%
%
µV
µV
%
Rev 0
Gain Error
Offset Voltage
Total Unadjusted Error
|VDIF
I
| ≤ 110mV
IADCx, IxP IxM = 0V
,
V
AVCC
= V
DVCC
= 5V
|VDIF
I
| ≥ 25mV
Slow Mode
Fast Mode
l
l
l
0.3
0
0
±1
±2
0.3
4
For more information
www.analog.com
LTC2949
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
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FPGA/CPLD
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