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LTC4304CDD

Description
I2C Buffer 3.3V/5V Automotive 10-Pin DFN EP
File Size445KB,16 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Download user manual Parametric View All

LTC4304CDD Overview

I2C Buffer 3.3V/5V Automotive 10-Pin DFN EP

LTC4304CDD Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesNot Compliant
ECCN (US)EAR99
Part StatusUnconfirmed
SVHCYes
SVHC Exceeds ThresholdYes
TypeBuffer
Maximum Clock Frequency (kHz)600(Typ)
Input Signal TypeI2C
Typical Input Capacitance (pF)10(Max)
Minimum Operating Supply Voltage (V)2.7
Maximum Operating Supply Voltage (V)5.5
Typical Operating Supply Voltage (V)3.3|5
Maximum Supply Current (mA)8
Minimum Operating Temperature (°C)0
Maximum Operating Temperature (°C)70
Supplier Temperature GradeCommercial
Standard Package NameDFN
Pin Count10
Supplier PackageDFN EP
MountingSurface Mount
Package Height0.75(Max)
Package Length3
Package Width3
PCB changed10
Lead ShapeNo Lead
FEATURES
LTC4304
Hot Swappable 2-Wire
Bus Buffer with Stuck
Bus Recovery
DESCRIPTIO
The LTC
®
4304 hot swappable 2-wire bus buffer allows I/O
card insertion into a live backplane without corruption of
the data and clock busses. When a connection is made,
the LTC4304 provides bidirectional buffering, keeping the
backplane and card capacitances isolated. If SDAOUT or
SCLOUT is low for ≥30ms (typ), the LTC4304 automatically
breaks the data and clock bus connection and FAULT will
pull low. At this time the LTC4304 automatically generates
up to 16 clock pulses on SCLOUT in an attempt to free the
bus. A connection will be enabled automatically when the
bus becomes free. A logic low on the ACC input enables
the LTC4304’s rise-time accelerators. A logic high on ACC
disables the rise-time accelerators, which allows SDA and
SCL bus pull-up voltages below V
CC
.
During insertion, the SDA and SCL lines are precharged
to 1V to minimize bus disturbances. When driven high,
ENABLE allows the LTC4304 to connect after a stop bit or
bus idle occurs. Driving ENABLE low breaks the connection
between SDAIN and SDAOUT, SCLIN and SCLOUT. READY
is an open drain output that indicates when the backplane
and card sides are connected together.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6356140, 6650174, 7032051.
Automatic Disconnect of SDA/SCL Lines when Bus
is Stuck Low for ≥30ms
Fault Flag for Stuck Bus
Recovers Stuck Busses with Automatic Clocking*
Bidirectional Buffer* for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
Allows Bus Pullup Voltages Above and Below V
CC
±15kV Human Body Model ESD Protection
Isolates Input SDA and SCL Lines from Output
Compatible with I
2
C
TM
, I
2
C Fast-Mode and SMBus
Standards (Up to 400kHz Operation)
READY Open Drain Output
1V Precharge on All SDA and SCL Lines
High Impedance SDA, SCL Pins for V
CC
= 0V
ENABLE Gates Connection from Input to Output
MSOP 10-Pin and DFN (3mm
×
3mm) Packages
Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
RAID Systems
APPLICATIO S
TYPICAL APPLICATIO
5V 3.3V
10k
BACK_SCL
10k
0.01µF
10k
V
CC
LTC4304
SCLIN
SCLOUT
CARD_SCL
SDAIN
5V/DIV
SDAIN
BACK_SDA
FAULT
3.3V
100k
ENABLE
GND
READY
ACC
4304
TA01
10k
SDAOUT
5V/DIV
SDAOUT
CARD_SDA
SCLOUT
5V/DIV
FAULT
5V/DIV
BACKPLANE
CONNECTOR
STAGGERED
CONNECTOR
CARD
4304fa
U
U
U
Stuck Bus Resolved with
Automatic Clocking
STUCK LOW > 30ms
RECOVERS
DISCONNECT AT TIMEOUT
AUTOMATIC CLOCKING
200
m
s/DIV
4304 TA01b
1
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