nRF52840
Product Specification
v1.1
4413_417 v1.1 / 2019-02-28
Downloaded from
Arrow.com.
Feature list
Features:
•
Bluetooth
5, IEEE 802.15.4-2006, 2.4 GHz transceiver
•
•
•
•
•
-95 dBm sensitivity in 1 Mbps
Bluetooth
low energy mode
-103 dBm sensitivity in 125 kbps
Bluetooth
low energy mode (long range)
-20 to +8 dBm TX power, configurable in 4 dB steps
On-air compatible with nRF52, nRF51, nRF24L, and nRF24AP Series
Supported data rates:
•
•
•
•
•
•
•
•
•
Bluetooth
5: 2 Mbps, 1 Mbps, 500 kbps, and 125 kbps
IEEE 802.15.4-2006: 250 kbps
Proprietary 2.4 GHz: 2 Mbps, 1 Mbps
•
•
®
®
®
®
•
Flexible power management
•
•
1.7 V to 5.5 V supply voltage range
On-chip DC/DC and LDO regulators with automated low
current modes
•
•
•
•
•
1.8 V to 3.3 V regulated supply for external components
Automated peripheral power management
Fast wake-up using 64 MHz internal oscillator
0.4 µA at 3 V in System OFF mode, no RAM retention
1.5 µA at 3 V in System ON mode, no RAM retention, wake on
RTC
1 MB flash and 256 kB RAM
Advanced on-chip interfaces
•
•
•
•
USB 2.0 full speed (12 Mbps) controller
QSPI 32 MHz interface
High-speed 32 MHz SPI
Type 2 near field communication (NFC-A) tag with wake-on
field
•
•
•
•
Touch-to-pair support
Single-ended antenna output (on-chip balun)
128-bit AES/ECB/CCM/AAR co-processor (on-the-fly packet encryption)
4.8 mA peak current in TX (0 dBm)
4.6 mA peak current in RX
RSSI (1 dB resolution)
®
®
ARM Cortex -M4 32-bit processor with FPU, 64 MHz
•
•
•
•
212 EEMBC CoreMark score running from flash memory
52 µA/MHz running CoreMark from flash memory
Watchpoint and trace debug modules (DWT, ETM, and ITM)
Serial wire debug (SWD)
Programmable peripheral interconnect (PPI)
48 general purpose I/O pins
EasyDMA automated data transfer between memory and
peripherals
•
Rich set of security features
•
ARM TrustZone Cryptocell 310 security subsystem
•
•
•
•
•
•
•
•
NIST SP800-90A and SP800-90B compliant random number generator
AES-128: ECB, CBC, CMAC/CBC-MAC, CTR, CCM/CCM*
Chacha20/Poly1305 AEAD supporting 128- and 256-bit key size
SHA-1, SHA-2 up to 256 bits
Keyed-hash message authentication code (HMAC)
RSA up to 2048-bit key size
SRP up to 3072-bit key size
ECC support for most used curves, among others P-256 (secp256r1) and •
Ed25519/Curve25519
•
•
Application key management using derived key model
•
•
•
•
•
•
•
•
•
•
•
•
•
•
®
®
Nordic SoftDevice ready with support for concurrent multi-
protocol
12-bit, 200 ksps ADC - 8 configurable channels with programmable
gain
64 level comparator
15 level low-power comparator with wake-up from System OFF
mode
Temperature sensor
4x 4-channel pulse width modulator (PWM) unit with EasyDMA
Audio peripherals: I2S, digital microphone interface (PDM)
5x 32-bit timer with counter mode
Up to 4x SPI master/3x SPI slave with EasyDMA
Up to 2x I2C compatible 2-wire master/slave
2x UART (CTS/RTS) with EasyDMA
Quadrature decoder (QDEC)
3x real-time counter (RTC)
Single crystal operation
Package variants
•
•
aQFN 73 package, 7 x 7 mm
WLCSP93 package, 3.544 x 3.607 mm
™
Secure boot ready
•
•
•
•
Flash access control list (ACL)
Root-of-trust (RoT)
Debug control and configuration
Access port protection (CTRL-AP)
•
Secure erase
4413_417 v1.1
Downloaded from
Arrow.com.
ii
Feature list
Applications:
•
Advanced computer peripherals and I/O devices
•
•
•
•
Mouse
Keyboard
Multi-touch trackpad
•
•
Internet of things (IoT)
•
•
Smart home sensors and controllers
Industrial IoT sensors and controllers
Interactive entertainment devices
•
•
Remote controls
Gaming controllers
Advanced wearables
•
•
Health/fitness sensor and monitor devices
Wireless payment enabled devices
4413_417 v1.1
Downloaded from
Arrow.com.
iii
Contents
Feature list
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ii
1
2
Revision history
.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
14
14
14
15
15
15
15
About this document
.
2.1 Document naming and status
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Peripheral naming and abbreviations
. . . . . . . . . . . . . . . . . . . . . . . .
2.3 Register tables
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1 Fields and values
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.1 DUMMY
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
4
Block diagram
.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
19
19
19
19
20
20
21
21
21
23
24
24
25
25
25
25
25
25
26
26
30
31
31
42
43
46
48
48
49
50
51
51
53
54
54
Core components
.
4.1 CPU
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.1 Floating point interrupt
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.2 CPU and support module configuration
. . . . . . . . . . . . . . . . . . . . .
4.1.3 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Memory
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2.1 RAM - Random access memory
. . . . . . . . . . . . . . . . . . . . . . . .
4.2.2 Flash - Non-volatile memory
. . . . . . . . . . . . . . . . . . . . . . . . .
4.2.3 Memory map
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2.4 Instantiation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 NVMC — Non-volatile memory controller
. . . . . . . . . . . . . . . . . . . . . .
4.3.1 Writing to flash
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.2 Erasing a page in flash
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.3 Writing to user information configuration registers (UICR)
. . . . . . . . . . . . .
4.3.4 Erasing user information configuration registers (UICR)
. . . . . . . . . . . . . . .
4.3.5 Erase all
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.6 Access port protection behavior
. . . . . . . . . . . . . . . . . . . . . . . .
4.3.7 Partial erase of a page in flash
. . . . . . . . . . . . . . . . . . . . . . . . .
4.3.8 Cache
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.9 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.10 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 FICR — Factory information configuration registers
. . . . . . . . . . . . . . . . . .
4.4.1 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 UICR — User information configuration registers
. . . . . . . . . . . . . . . . . . .
4.5.1 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 EasyDMA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6.1 EasyDMA error handling
. . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6.2 EasyDMA array list
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.7 AHB multilayer
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8 Debug and trace
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8.1 DAP - Debug access port
. . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8.2 CTRL-AP - Control access port
. . . . . . . . . . . . . . . . . . . . . . . . .
4.8.3 Debug interface mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8.4 Real-time debug
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8.5 Trace
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4413_417 v1.1
Downloaded from
Arrow.com.
iv
5
Power and clock management
.
. . . . . . . . . . . . . . . . . . . . . . .
55
55
55
56
61
61
66
67
68
68
69
70
80
82
83
84
87
96
5.1 Power management unit (PMU)
. . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Current consumption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2.1 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 POWER — Power supply
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.1 Main supply
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.2 USB supply
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.3 System OFF mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.4 System ON mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.5 RAM power control
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.6 Reset
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.7 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.8 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 CLOCK — Clock control
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.1 HFCLK controller
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.2 LFCLK controller
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.3 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.4 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Peripherals
.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
99
99
99
100
100
100
100
100
101
101
102
102
102
103
103
103
107
107
109
111
111
112
112
113
113
114
115
116
116
123
123
124
125
127
134
6.1 Peripheral interface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.1 Peripheral ID
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.2 Peripherals with shared ID
. . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.3 Peripheral registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.4 Bit set and clear
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.5 Tasks
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.6 Events
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.7 Shortcuts
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1.8 Interrupts
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2 AAR — Accelerated address resolver
. . . . . . . . . . . . . . . . . . . . . . .
6.2.1 EasyDMA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2.2 Resolving a resolvable address
. . . . . . . . . . . . . . . . . . . . . . . .
6.2.3 Use case example for chaining RADIO packet reception with address resolution using AAR
.
6.2.4 IRK data structure
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2.5 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2.6 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3 ACL — Access control lists
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3.1 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4 CCM — AES CCM mode encryption
. . . . . . . . . . . . . . . . . . . . . . . .
6.4.1 Key-steam generation
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4.2 Encryption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4.3 Decryption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4.4 AES CCM and RADIO concurrent operation
. . . . . . . . . . . . . . . . . . .
6.4.5 Encrypting packets on-the-fly in radio transmit mode
. . . . . . . . . . . . . . .
6.4.6 Decrypting packets on-the-fly in radio receive mode
. . . . . . . . . . . . . . .
6.4.7 CCM data structure
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4.8 EasyDMA and ERROR event
. . . . . . . . . . . . . . . . . . . . . . . . .
6.4.9 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4.10 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5 COMP — Comparator
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.1 Differential mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.2 Single-ended mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.3 Registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5.4 Electrical specification
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4413_417 v1.1
Downloaded from
Arrow.com.
v