STM32WB55xx
STM32WB35xx
Multiprotocol wireless 32-bit MCU Arm
®
-based Cortex
®
-M4
with FPU, Bluetooth
®
5.2 and 802.15.4 radio solution
Datasheet
-
production data
Features
Include ST state-of-the-art patented
technology
Radio
– 2.4 GHz
– RF transceiver supporting Bluetooth
®
5.2
specification, IEEE 802.15.4-2011 PHY
and MAC, supporting Thread and
Zigbee
®
3.0
– RX sensitivity: -96 dBm (Bluetooth
®
Low
Energy at 1 Mbps), -100 dBm (802.15.4)
– Programmable output power up to +6 dBm
with 1 dB steps
– Integrated balun to reduce BOM
– Support for 2 Mbps
– Dedicated Arm
®
32-bit Cortex
®
M0+ CPU
for real-time Radio layer
– Accurate RSSI to enable power control
– Suitable for systems requiring compliance
with radio frequency regulations ETSI EN
300 328, EN 300 440, FCC CFR47 Part 15
and ARIB STD-T66
– Support for external PA
– Available integrated passive device (IPD)
companion chip for optimized matching
solution (MLPF-WB-01E3 or
MLPF-WB-02E3)
Ultra-low-power platform
– 1.71 to 3.6 V power supply
– – 40 °C to 85 / 105 °C temperature ranges
– 13 nA shutdown mode
– 600 nA Standby mode + RTC + 32 KB
RAM
– 2.1 µA Stop mode + RTC + 256 KB RAM
– Active-mode MCU: < 53 µA / MHz when RF
and SMPS on
– Radio: Rx 4.5 mA / Tx at 0 dBm 5.2 mA
.
UFQFPN48
7 x 7 mm solder pad
VFQFPN68
8 x 8 mm solder pad
FBGA
WLCSP100
0.4 mm pitch
UFBGA129
0.5 mm pitch
Core: Arm
®
32-bit Cortex
®
-M4 CPU with FPU,
adaptive real-time accelerator (ART
Accelerator) allowing 0-wait-state execution
from Flash memory, frequency up to 64 MHz,
MPU, 80 DMIPS and DSP instructions
Performance benchmark
– 1.25 DMIPS/MHz (Drystone 2.1)
– 219.48 CoreMark
®
(3.43 CoreMark/MHz at
64 MHz)
Energy benckmark
– 303 ULPMark™ CP score
Supply and reset management
– High efficiency embedded SMPS
step-down converter with intelligent bypass
mode
– Ultra-safe, low-power BOR (brownout
reset) with five selectable thresholds
– Ultra-low-power POR/PDR
– Programmable voltage detector (PVD)
– V
BAT
mode with RTC and backup registers
Clock sources
– 32 MHz crystal oscillator with integrated
trimming capacitors (Radio and CPU clock)
– 32 kHz crystal oscillator for RTC (LSE)
– Internal low-power 32 kHz (±5%) RC (LSI1)
– Internal low-power 32 kHz (stability
±500 ppm) RC (LSI2)
April 2021
This is information on a product in full production.
DS11929 Rev 11
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www.st.com
STM32WB55xx STM32WB35xx
– Internal multispeed 100 kHz to 48 MHz
oscillator, auto-trimmed by LSE (better than
±0.25% accuracy)
– High speed internal 16 MHz factory
trimmed RC (±1%)
– 2x PLL for system clock, USB, SAI and
ADC
Memories
– Up to 1 MB Flash memory with sector
protection (PCROP) against R/W
operations, enabling radio stack and
application
– Up to 256 KB SRAM, including 64 KB with
hardware parity check
– 20x32-bit backup register
– Boot loader supporting USART, SPI, I2C
and USB interfaces
– OTA (over the air) Bluetooth
®
Low Energy
and 802.15.4 update
– Quad SPI memory interface with XIP
– 1 Kbyte (128 double words) OTP
Rich analog peripherals (down to 1.62 V)
– 12-bit ADC 4.26 Msps, up to 16-bit with
hardware oversampling, 200 µA/Msps
– 2x ultra-low-power comparator
– Accurate 2.5 V or 2.048 V reference
voltage buffered output
System peripherals
– Inter processor communication controller
(IPCC) for communication with Bluetooth
®
Low Energy and 802.15.4
– HW semaphores for resources sharing
between CPUs
– 2x DMA controllers (7x channels each)
supporting ADC, SPI, I2C, USART, QSPI,
SAI, AES, timers
– 1x USART (ISO 7816, IrDA, SPI Master,
Modbus and Smartcard mode)
– 1x LPUART (low power)
– 2x SPI 32 Mbit/s
– 2x I2C (SMBus/PMBus)
– 1x SAI (dual channel high quality audio)
– 1x USB 2.0 FS device, crystal-less, BCD
and LPM
– Touch sensing controller, up to 18 sensors
– LCD 8x40 with step-up converter
– 1x 16-bit, four channels advanced timer
– 2x 16-bit, two channels timer
– 1x 32-bit, four channels timer
– 2x 16-bit ultra-low-power timer
– 1x independent Systick
– 1x independent watchdog
– 1x window watchdog
Security and ID
– Secure firmware installation (SFI) for
Bluetooth
®
Low Energy and 802.15.4 SW
stack
– 3x hardware encryption AES maximum
256-bit for the application, the Bluetooth
®
Low Energy and IEEE802.15.4
– Customer key storage / key manager
services
– HW public key authority (PKA)
– Cryptographic algorithms: RSA,
Diffie-Helman, ECC over GF(p)
– True random number generator (RNG)
– Sector protection against R/W operation
(PCROP)
– CRC calculation unit
– Die information: 96-bit unique ID
– IEEE 64-bit unique ID. Possibility to derive
802.15.4 64-bit and Bluetooth
®
Low Energy
48-bit EUI
Up to 72 fast I/Os, 70 of them 5 V-tolerant
Development support
– Serial wire debug (SWD), JTAG for the
application processor
– Application cross trigger with input / output
– Embedded Trace Macrocell™ for
application
All packages are ECOPACK2 compliant
Table 1. Device summary
Reference
STM32WB55xx
STM32WB35xx
Part numbers
STM32WB55CC, STM32WB55CE, STM32WB55CG, STM32WB55RC, STM32WB55RE, STM32WB55RG,
STM32WB55VC, STM32WB55VE, STM32WB55VG, STM32WB55VY
STM32WB35CC, STM32WB35CE
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STM32WB55xx STM32WB35xx
Contents
Contents
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1
3.2
3.3
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Arm
®
Cortex
®
-M4 core with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3.1
3.3.2
3.3.3
3.3.4
Adaptive real-time memory accelerator (ART Accelerator) . . . . . . . . . . 19
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4
3.5
3.6
Security and safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Boot modes and FW update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
RF subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
RF front-end block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
BLE general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
802.15.4 general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
RF pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Typical RF application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power supply distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Linear voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.7
Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.7.1
3.7.2
3.7.3
3.7.4
3.7.5
3.7.6
3.8
3.9
3.10
3.11
3.12
3.13
VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 43
Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
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3.13.1
3.13.2
STM32WB55xx STM32WB35xx
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 44
Extended interrupts and events controller (EXTI) . . . . . . . . . . . . . . . . . 45
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.14
Analog to digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.14.1
3.14.2
3.15
3.16
3.17
3.18
3.19
3.20
Voltage reference buffer (VREFBUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Touch sensing controller (TSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Liquid crystal display controller (LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
True random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.20.1
3.20.2
3.20.3
3.20.4
3.20.5
3.20.6
Advanced-control timer (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
General-purpose timers (TIM2, TIM16, TIM17) . . . . . . . . . . . . . . . . . . . 50
Low-power timer (LPTIM1 and LPTIM2) . . . . . . . . . . . . . . . . . . . . . . . . 51
Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
System window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3.21
3.22
3.23
3.24
3.25
3.26
3.27
3.28
Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 52
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Universal synchronous/asynchronous receiver transmitter (USART) . . . 54
Low-power universal asynchronous receiver transmitter (LPUART) . . . . 54
Serial peripheral interface (SPI1, SPI2) . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Serial audio interfaces (SAI1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 56
Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.28.1
3.28.2
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 57
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4
5
6
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.1.1
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
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6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
Contents
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
6.2
6.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10
6.3.11
6.3.12
6.3.13
6.3.14
6.3.15
6.3.16
6.3.17
6.3.18
6.3.19
6.3.20
6.3.21
6.3.22
6.3.23
6.3.24
6.3.25
6.3.26
6.3.27
6.3.28
Summary of main performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
RF BLE characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
RF 802.15.4 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 96
Embedded reset and power control block characteristics . . . . . . . . . . . 96
Embedded voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Wakeup time from Low-power modes and voltage scaling
transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 122
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Analog switches booster . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Analog-to-Digital converter characteristics . . . . . . . . . . . . . . . . . . . . . 140
Voltage reference buffer characteristics . . . . . . . . . . . . . . . . . . . . . . . 152
Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
V
BAT
monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
SMPS step-down converter characteristics . . . . . . . . . . . . . . . . . . . . . 156
LCD controller characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Clock recovery system (CRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
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