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PCA9554U

Description
8 I/O, PIA-GENERAL PURPOSE, PDSO16
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size590KB,35 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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PCA9554U Overview

8 I/O, PIA-GENERAL PURPOSE, PDSO16

PCA9554U Parametric

Parameter NameAttribute value
MakerNXP
package instructionDIE,
Reach Compliance Codeunknow
ECCN codeEAR99
JESD-30 codeX-XUUC-N
Number of I/O lines8
Number of ports1
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialUNSPECIFIED
encapsulated codeDIE
Package shapeUNSPECIFIED
Package formUNCASED CHIP
Maximum supply voltage5.5 V
Minimum supply voltage2.3 V
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formNO LEAD
Terminal locationUPPER
uPs/uCs/peripheral integrated circuit typePARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches1
PCA9554; PCA9554A
8-bit I
2
C-bus and SMBus I/O port with interrupt
Rev. 9 — 19 March 2013
Product data sheet
1. General description
The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General
Purpose parallel Input/Output (GPIO) expansion for I
2
C-bus/SMBus applications and
were developed to enhance the NXP Semiconductors family of I
2
C-bus I/O expanders.
The improvements include higher drive capability, 5 V I/O tolerance, lower supply current,
individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O
expanders provide a simple solution when additional I/O is needed for ACPI power
switches, sensors, push buttons, LEDs, fans, and so on.
The PCA9554/PCA9554A consist of an 8-bit Configuration register (Input or Output
selection); 8-bit Input Port register, 8-bit Output Port register and an 8-bit Polarity
Inversion register (active HIGH or active LOW operation). The system master can enable
the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for
each input or output is kept in the corresponding Input Port or Output Port register. The
polarity of the read register can be inverted with the Polarity Inversion register. All
registers can be read by the system master. Although pin-to-pin and I
2
C-bus address
compatible with the PCF8574 series, software changes are required due to the
enhancements and are discussed in
Application Note AN469.
The PCA9554/PCA9554A open-drain interrupt output is activated when any input state
differs from its corresponding Input Port register state and is used to indicate to the
system master that an input state has changed. The power-on reset sets the registers to
their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I
2
C-bus address and allow up to eight
devices to share the same I
2
C-bus/SMBus. The PCA9554A is identical to the PCA9554
except that the fixed I
2
C-bus address is different allowing up to sixteen of these devices
(eight of each) on the same I
2
C-bus/SMBus.
2. Features and benefits
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant I/Os
Polarity Inversion register
Active LOW interrupt output
Low standby current
Noise filter on SCL/SDA inputs
No glitch on power-up
Internal power-on reset
8 I/O pins which default to 8 inputs
0 Hz to 400 kHz clock frequency

PCA9554U Related Products

PCA9554U PCA9554PW-T PCA9554PW/Q900 PCA9554ABS PCA9554ABS3 PCA9554APW PCA9554BS
Description 8 I/O, PIA-GENERAL PURPOSE, PDSO16 8 I/O, PIA-GENERAL PURPOSE, PDSO16 8 I/O, PIA-GENERAL PURPOSE, PDSO16 8 I/O, PIA-GENERAL PURPOSE, PDSO16 8 I/O, PIA-GENERAL PURPOSE, PDSO16 8 I/O, PIA-GENERAL PURPOSE, PDSO16 8 I/O, PIA-GENERAL PURPOSE, PDSO16
Maker NXP NXP NXP NXP NXP NXP NXP
package instruction DIE, TSSOP, TSSOP16,.25 TSSOP-16 HVQFN-16 HVQFN-16 TSSOP-16 HVQCCN, LCC16,.16SQ,25
Reach Compliance Code unknow unknow unknow compli compli compli compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
JESD-30 code X-XUUC-N R-PDSO-G16 R-PDSO-G16 S-PQCC-N16 S-PQCC-N16 R-PDSO-G16 S-PQCC-N16
Number of I/O lines 8 8 8 8 8 8 8
Number of ports 1 1 1 1 1 1 1
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material UNSPECIFIED PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIE TSSOP TSSOP HVQCCN HVQCCN TSSOP HVQCCN
Package shape UNSPECIFIED RECTANGULAR RECTANGULAR SQUARE SQUARE RECTANGULAR SQUARE
Package form UNCASED CHIP SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Maximum supply voltage 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V
Nominal supply voltage 3 V 3 V 3 V 3 V 3 V 3 V 3 V
surface mount YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form NO LEAD GULL WING GULL WING NO LEAD NO LEAD GULL WING NO LEAD
Terminal location UPPER DUAL DUAL QUAD QUAD DUAL QUAD
uPs/uCs/peripheral integrated circuit type PARALLEL IO PORT, GENERAL PURPOSE PARALLEL IO PORT, GENERAL PURPOSE PARALLEL IO PORT, GENERAL PURPOSE PARALLEL IO PORT, GENERAL PURPOSE PARALLEL IO PORT, GENERAL PURPOSE PARALLEL IO PORT, GENERAL PURPOSE PARALLEL IO PORT, GENERAL PURPOSE
Is it lead-free? - Lead free - Lead free - Lead free Lead free
Is it Rohs certified? - conform to - conform to conform to conform to conform to
Parts packaging code - TSSOP TSSOP QFN QFN TSSOP QFN
Contacts - 16 16 16 16 16 16
JESD-609 code - e4 - e4 e4 e4 e4
length - 5 mm 5 mm 4 mm 3 mm 5 mm 4 mm
Humidity sensitivity level - 1 - 1 1 1 1
Number of digits - 8 - 8 8 8 8
Number of terminals - 16 16 16 16 16 16
Encapsulate equivalent code - TSSOP16,.25 - LCC16,.16SQ,25 LCC16,.12SQ,20 TSSOP16,.25 LCC16,.16SQ,25
Peak Reflow Temperature (Celsius) - NOT SPECIFIED - 260 260 260 260
power supply - 2.5/5 V - 2.5/5 V 2.5/5 V 2.5/5 V 2.5/5 V
Certification status - Not Qualified - Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height - 1.1 mm 1.1 mm 1 mm 1 mm 1.1 mm 1 mm
Terminal surface - Nickel/Palladium/Gold (Ni/Pd/Au) - Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal pitch - 0.65 mm 0.65 mm 0.65 mm 0.5 mm 0.65 mm 0.65 mm
Maximum time at peak reflow temperature - NOT SPECIFIED - 30 30 30 30
width - 4.4 mm 4.4 mm 4 mm 3 mm 4.4 mm 4 mm
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