®
SP6203/6205
Low Noise, 300mA and 500mA CMOS LDO Regulators
FEATURES
■
Very Low Dropout Voltage: 0.6Ω PMOS Pass
Device
■
Accurate Output Voltage: 2% over Temperature
■
Guaranteed 500mA Output Current: SP6205
■
Ultra Low Noise Output: 12µV
RMS
with 10nF
Bypass
■
Unconditionally Stable with 2.2µF Ceramic
■
Low Quiescent Current: 45µA
■
Very Low Ground Current: 350µA at 500 mA
■
Power-Saving Shutdown Mode: < 1µA
■
Fast Turn-On and Turn-Off: 60us
■
Fast Transient Response
■
Current Limit and Thermal Shutdown Protection
■
Very Good Load/Line Regulation: 0.07/0.04%
■
Excellent PSRR: 67dB<1kHz
■
Industry Standard 5 pin SOT-23 and Small 8
pin DFN Package
■
Fixed Output Voltages: 2.5V, 2.7V, 2.8V,
2.85V, 3.0V and 3.3V
■
Adjustable Output Available
Fixed
V
OUTSENSE
BYP
GND
EN
1
2
3
4
8 V
OUT
ADJ
1
2
3
4
Adjustable
8 V
OUT
SP6203
SP6205
8 Pin DFN
7
6
5
NC
NC
NC
GND
V
IN
EN
SP6203
SP6205
8 Pin DFN
7
6
5
NC
NC
V
IN
Now Available in Lead Free Packaging
APPLICATIONS
■
Cellular / GSM Phones
■
Laptop / Palmtop Computers
■
Battery-Powered Systems
■
Pagers
■
Medical Devices
■
MP3/CD Players
■
Digital Still Cameras
DESCRIPTION
The SP6203/6205 are ultra low noise CMOS LDOs with very low dropout and ground current. The noise
performance is achieved by means of an external bypass capacitor without sacrificing turn-on and turn-off
speed critical to portable applications. Extremely stable and easy to use, these devices offer excellent PSRR
and Line/Load regulation. Target applications include battery-powered equipment such as portable and
wireless products. Regulators' ground current increases only slightly in dropout. Fast turn-on/turn-off enable
control and an internal 30Ω pull down on output allows quick discharge of output even under no load
conditions. Both LDOs are protected with current limit and thermal shutdown.
Both LDO's are availiable in fixed & adjustable output voltage versions and come in an industry standard
5 pin SOT-23 and small 8 pin DFN package. For SC-70 100mA CMOS LDO, SP6213 is available.
TYPICAL APPLICATION CIRCUIT
V
IN
C
IN
2.2µF
2
1
5
V
OUT
C
OUT
2.2µF Ceramic
V
IN
C
IN
2.2µF
1
5
V
OUT
C
OUT
2.2µF Ceramic
SP6203
SP6205
5-Pin
FIXED
4
BYP
2
SP6203
SP6205
5-Pin
ADJUSTABLE
4
ADJ
EN
3
EN
3
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
© Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
Supply Input Voltage (V
IN
) ...................................................... -2V to 6V
Output Voltage (V
OUT
) ................................................. -0.6V to V
IN
+1V
Enable Input Voltage (V
EN
) ..................................................... -2V to 6V
Power Dissipation (P
D
) ................................... Internally Limited, Note 1
Lead Temperature (soldering 5s) .............................................. +260°C
Storage Temperature .................................................. -65°C to +150°C
Junction Temperature ............................................................... +150°C
These are stress ratings only and functional operation of the device at these
ratings or any other above those indicated in the operation sections of the
specifications below is not implied. Exposure to absolute maximum rating
conditions for extended periods of time may affect reliability.
OPERATING RATINGS
Input Voltage (V
IN
) ......................................................... +2.7V to +5.5V
Enable Input Voltage (V
EN
) ...................................................... 0 to 5.5V
Junction Temperature (T
J
) ........................................... -40°C to +125°C
Thermal Resistance, SOT-23-5 (θ
JA
) ........................................... Note 1
Thermal Resistance, 8 Pin DFN (θ
JA
) .......................................... Note 1
Remark: The device is not guaranteed to function outside its operating rating.
ELECTRICALCHARACTERISTICS
Unless otherwise specified: V
IN
=V
OUT
+ 0.5V to 6V, C
OUT
= 2.2µF ceramic, C
IN
= 2.2µF, I
OUT
=100µA,
-40°C < T < 125°C. The
♦
denotes the specifications which apply over full operating temperature range -40°C to
+125°C, unless otherwise specified.
PARAMETER
Input Voltage
Output Voltage Accuracy
Output Voltage
Temperature Coefficient, Note2
Reference Voltage
Line Regulation
Load Regulation, Note 3
Dropout Voltage, Note 4
(For V
OUT
≥
3.0V)
MIN
-2
50
1.225
1.25
0.04
0.07
0.13
0.06
60
120
180
300
45
110
175
235
350
0.01
0.50
0.85
170
12
67
150
630
12
50
0.05
25
60
100
15
30
1.6
1.275
0.3
0.3
0.5
TYP
MAX
6
+2
UNITS
V
%
ppm/°C
V
%/V
%
♦
♦
♦
CONDITIONS
Variation from specified V
OUT
∆V
OUT
/∆T
Adjustable version only
∆V
OUT
(V
IN
below 6V)
I
OUT
= 0.1mA to 300mA (SP6203)
I
OUT
= 0.1mA to 500mA (SP6205)
I
OUT
= 0.1mA
I
OUT
= 100mA
I
OUT
= 200mA
I
OUT
= 300mA (SP6203)
I
OUT
= 500mA (SP6205)
I
OUT
= 0.1mA (I
QUIESCENT
)
I
OUT
= 100mA
I
OUT
= 200mA
I
OUT
= 300mA (SP6203)
I
OUT
= 500mA (SP6205)
V
EN
< 0.4V (shutdown)
V
OUT
= 0V (SP6203)
V
OUT
= 0V (SP6205)
Regulator Turns off
Regulator turns on again at 158°C
f
≤
1kHz
C
BYP
= 0nF, I
OUT
= 0.1mA
C
BYP
= 0nF, I
OUT
=300mA
C
BYP
= 10nF, I
OUT
= 0.1mA
C
BYP
= 10nF, I
OUT
= 300mA
∆V
OUT
/∆P
D
V
IN
≥
4V, Note 10
I
OUT
= 30mA
V
IN
≥
4V, Note 10
I
OUT
= 30mA
I
OUT
= 0.1mA, V
IN
≥
4V, Note 10
I
OUT
= 300mA, V
IN
≥
4V, Note 10
No Load
Regulator Shutdown
Regulator Enabled
♦
mV
300
500
100
µA
330
490
1
0.8
1.4
♦
♦
♦
♦
♦
♦
Ground Pin Current, Note 5
Shutdown Supply Current
Current Limit
Thermal Shutdown Junction
Temperature
Thermal Shutdown Hysteresis
Power Supply Rejection Ratio
Output Noise Voltage, Note 6
0.33
0.55
µA
A
°C
°C
dB
µV
RMS
75
50
120
250
25
0.4
%/W
µs
µs
µs
Ω
V
V
Thermal Regulation, Note 7
Wake-Up Time (T
WU
), Note 8
(from shutdown mode)
Turn-On Time (T
ON
), Note 9
(from shutdown mode)
Turn-Off Time (T
OFF
),
Output Discharge Resistance
Enable Input Logic Low Voltage
Enable Input Logic High Voltage
♦
♦
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
© Copyright 2004 Sipex Corporation
2
ELECTRICAL CHARACTERISTIC NOTES
Note 1:
Maximum power dissipation can be calculated using the formula:
P
D
= (T
J(max)
- T
A
) /
θ
JA
, where T
J(max)
is
the junction temperature, T
A
is the ambient temperature and
θ
JA
is the junction-to-ambient thermal resistance.
θ
JC
is 6ºC/W for this package. Exceeding the maximum allowable power dissipation will result in excessive die
temperature and thermal shutdown protection. For 5 Pin SOT-23
θ
JA
is
191
°
C/W
and
59
°
C/W
for the 8 Pin DFN. A
part mounted on a PC board will deliver improved thermal perfformance based on copper surface area.
Note 2:
Output voltage temperature coefficient is defined as the worst case voltage change divided by the total
temperature range.
Note 3:
Regulation is measured at constant junction temperature using low duty cycle pulse testing. Changes in
output voltage due to heating effects are covered by the thermal regulation specification.
Note 4:
Dropout-voltage is defined as the input to output differential at which the output voltage drops 2% below its
nominal value measured at 1V differential.
Note 5:
Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of
the load current plus the ground pin current.
Note 6:
Output noise voltage is defined within a certain bandwidth, namely 10Hz < BW < 100kHz. An external
bypass cap (10nF) from reference output (BYP pin) to ground significantly reduces noise at output.
Note 7:
Thermal regulation is defined as the change in output voltage at a time “t” after a change in power
dissipation is applied, excluding load and line regulation effects.
Specifications are for a 300mA load pulse at V
IN
= 6V for t = 1ms.
Note 8:
The wake-up time (T
WU
) is defined as the time it takes for the output to start rising after enable is brought
high.
Note 9:
The total turn-on time is called the settling time (T
S
), which is defined as the condition when both the
output and the bypass node are within 2% of their fully enabled values when released from shutdown.
Note 10:
For output voltage versions requiring VIN to be lower than 4V, timing (T
ON
& T
OFF
) increases slightly.
FUNCTIONAL DIAGRAM
VIN
EN
bandgap 1.25V
reference
V
OUT
V
IN
EN
bandgap 1.25V
reference
V
OUT
R1
BYP
current limit
&
thermal shutdown
GND
Cbyp
(optional)
ADJ
current limit
&
thermal shutdown
GND
R2
Low Noise Fixed Regulator - 5 Pin
Low Noise Adjustable Regulator - 5 Pin
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
© Copyright 2004 Sipex Corporation
3
PIN DESCRIPTION
5 PIN OPTION
PIN NUMBER
1
2
3
4 (Fixed)
NAME
V
IN
GND
EN
BYP
FUNCTION
Power Supply Input
Ground Terminal
Enable/Shutdown (Logic high = enable, logic
low = shutdown)
Reference bypass input for ultra-quiet operation.
Connecting a 10nF cap on this pin reduces
output noise.
Adjustable (Input): Adjustable regulator feed-
back input. Connect to a resistive voltage-
divider network.
Regulator Output Voltage
4 (adj.)
ADJ
5
V
OUT
PINOUTS
EN GND V
IN
2
1
3
EN GND V
IN
3
2
1
SIPEX
4
BYP
5
V
OUT
4
SIPEX
5
V
OUT
ADJ
Fixed Voltage Regulator
Adjustable Voltage Regulator
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
© Copyright 2004 Sipex Corporation
4
TYPICAL PERFORMANCE CHARACTERISTICS
V
OUT
V
OUT
I
O
(200mA/DIV)
V
EN
Current Limit
Turn on Time, R
LOAD
= 50Ω (60mA)
V
OUT
V
OUT
V
EN
V
EN
Turn off Time, R
LOAD
= 6Ω (500mA)
Turn off Time, R
LOAD
= 30K (0.1mA)
V
OUT
(AC)
V
OUT
(AC)
V
IN
I
OUT
Load Regulation, I
O
= 100µA ~ 500mA
Line Regulation, Line Step from 4V to 6V, I
O
= 1mA
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
© Copyright 2004 Sipex Corporation
5
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