dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X
16-Bit Microcontrollers and Digital Signal Controllers
with High-Speed PWM, Op Amps and Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
•
3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
Timers/Output Compare/Input Capture
• 12 General Purpose Timers:
- Five 16-bit and up to two 32-bit timers/counters
- Four OC modules, configurable as timers/counters
- PTG module with two configurable timers/counters
- 32-bit Quadrature Encoder Interface (QEI) module,
configurable as a timer/counter
• Four IC modules
• Peripheral Pin Select (PPS) to allow Function Remap
• Peripheral Trigger Generator (PTG) for Scheduling
Complex Sequences
Core: 16-Bit dsPIC33E/PIC24E CPU
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Code Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL plus Hardware Divide
32-bit multiply support
1.0% Internal Oscillator
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Low-Power Management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
0.6 mA/MHz Dynamic Current (typical)
30 µA I
PD
Current (typical)
Clock Management
Communication Interfaces
• Two UART modules (17.5 Mbps)
- With support for LIN/J2602 protocols and IrDA
®
• Two 4-Wire SPI modules (15 Mbps)
• ECAN™ module (1 Mbaud) CAN 2.0B Support
• Two I
2
C™ modules (up to 1 Mbaud) with SMBus
Support
• PPS to allow Function Remap
• Programmable Cyclic Redundancy Check (CRC)
Power Management
Direct Memory Access (DMA)
• 4-Channel DMA with User-Selectable Priority Arbitration
• UART, SPI, ADC, ECAN, IC, OC and Timers
High-Speed PWM
Up to Three PWM Pairs with Independent Timing
Dead Time for Rising and Falling Edges
7.14 ns PWM Resolution
PWM Support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault Inputs
• Flexible Trigger Configurations for ADC Conversions
Input/Output
• Sink/Source 12 mA or 6 mA, Pin-Specific for
Standard V
OH
/V
OL
, up to 22 or 14 mA, respectively
for Non-Standard V
OH
1
• 5V Tolerant Pins
• Selectable Open-Drain, Pull-ups and Pull-Downs
• Up to 5 mA Overvoltage Clamp Current
• External Interrupts on All I/O Pins
Advanced Analog Features
• ADC module:
- Configurable as 10-bit, 1.1 Msps with four S&H or
12-bit, 500 ksps with one S&H
- Six analog inputs on 28-pin devices and up to
16 analog inputs on 64-pin devices
• Flexible and Independent ADC Trigger Sources
• Up to Three Op Amp/Comparators with
Direct Connection to the ADC module:
- Additional dedicated comparator
- Programmable references with 32 voltage points
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1, -40ºC to +125ºC) Planned
• AEC-Q100 REVG (Grade 0, -40ºC to +150ºC) Planned
• Class B Safety Library, IEC 60730
Debugger Development Support
•
•
•
•
In-Circuit and In-Application Programming
Two Program and Two Complex Data Breakpoints
IEEE 1149.2 Compatible (JTAG) Boundary Scan
Trace and Run-Time Watch
2011-2013 Microchip Technology Inc.
DS70657G-page 1
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X AND
PIC24EPXXXGP/MC20X PRODUCT
FAMILIES
The device names, pin counts, memory sizes and
peripheral availability of each device are listed in
Table 1
(General Purpose Families) and
Table 2
(Motor
Control Families). Their pinout diagrams appear on the
following pages.
TABLE 1:
dsPIC33EPXXXGP50X and PIC24EPXXXGP20X GENERAL PURPOSE FAMILIES
Program Flash Memory (Kbytes)
Page Erase Size (Instructions)
10-Bit/12-Bit ADC (Channels)
Remappable Peripherals
Op Amps/Comparators
External Interrupts
(3)
ECAN™ Technology
16-Bit/32-Bit Timers
Output Compare
Input Capture
CRC Generator
RAM (Kbyte)
PIC24EP32GP202
PIC24EP64GP202
PIC24EP128GP202
PIC24EP256GP202
PIC24EP512GP202
PIC24EP32GP203
PIC24EP64GP203
PIC24EP32GP204
PIC24EP64GP204
PIC24EP128GP204
PIC24EP256GP204
PIC24EP512GP204
PIC24EP64GP206
PIC24EP128GP206
PIC24EP256GP206
PIC24EP512GP206
dsPIC33EP32GP502
dsPIC33EP64GP502
dsPIC33EP128GP502
dsPIC33EP256GP502
dsPIC33EP512GP502
dsPIC33EP32GP503
dsPIC33EP64GP503
dsPIC33EP32GP504
dsPIC33EP64GP504
dsPIC33EP128GP504
dsPIC33EP256GP504
dsPIC33EP512GP504
dsPIC33EP64GP506
dsPIC33EP128GP506
dsPIC33EP256GP506
dsPIC33EP512GP506
Note 1:
2:
3:
4:
512
1024
1024
1024
1024
512
1024
512
1024
1024
1024
1024
1024
1024
1024
1024
512
1024
1024
1024
1024
512
1024
512
1024
1024
1024
1024
1024
1024
1024
1024
32
64
128
256
512
32
64
32
64
128
256
512
64
128
256
512
32
64
128
256
512
32
64
32
64
128
256
512
64
128
256
512
4
8
16
32
48
4
8
4
8
16
32
48
8
16
32
48
4
8
16
32
48
4
8
4
8
16
32
48
8
16
32
48
5
4
4
2
2
1
3
2
1
16
3/4
Yes
Yes
53
64
TQFP,
QFN
5
4
4
2
2
1
3
2
1
9
3/4
Yes
Yes
35
44
VTLA
(4)
,
TQFP,
QFN
5
4
4
2
2
1
3
2
1
8
3/4
Yes
Yes
25
36
VTLA
5
4
4
2
2
1
3
2
1
6
2/3
(1)
SPI
(2)
Device
5
4
4
2
2
—
3
2
1
6
2/3
(1)
Yes
Yes
21
28
SPDIP,
SOIC,
SSOP
(4)
,
QFN-S
5
4
4
2
2
—
3
2
1
8
3/4
Yes
Yes
25
36
VTLA
5
4
4
2
2
—
3
2
1
9
3/4
Yes
Yes
35
44
VTLA
(4)
,
TQFP,
QFN
5
4
4
2
2
—
3
2
1
16
3/4
Yes
Yes
53
64
TQFP,
QFN
Yes
Yes
21
28
SPDIP,
SOIC,
SSOP
(4)
,
QFN-S
On 28-pin devices, Comparator 4 does not have external connections. Refer to
Section 25.0 “Op Amp/Comparator Module”
for details.
Only SPI2 is remappable.
INT0 is not remappable.
The SSOP and VTLA packages are not available for devices with 512 Kbytes of memory.
DS70657G-page 2
2011-2013 Microchip Technology Inc.
Packages
I/O Pins
CTMU
I
2
C™
UART
Pins
PTG
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
TABLE 2:
dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X MOTOR CONTROL
FAMILIES
Program Flash Memory (Kbytes)
Page Erase Size (Instructions)
Remappable Peripherals
Quadrature Encoder Interface
10-Bit/12-Bit ADC (Channels)
Op Amps/Comparators
Motor Control PWM
(4)
(Channels)
External Interrupts
(3)
ECAN™ Technology
16-Bit/32-Bit Timers
Output Compare
Input Capture
CRC Generator
RAM (Kbytes)
PIC24EP32MC202
PIC24EP64MC202
PIC24EP128MC202
PIC24EP256MC202
PIC24EP512MC202
PIC24EP32MC203
PIC24EP64MC203
PIC24EP32MC204
PIC24EP64MC204
PIC24EP128MC204
PIC24EP256MC204
PIC24EP512MC204
PIC24EP64MC206
PIC24EP128MC206
PIC24EP256MC206
PIC24EP512MC206
dsPIC33EP32MC202
dsPIC33EP64MC202
512
1024
32
64
4
8
16
32
48
4
8
4
8
16
32
48
8
16
32
48
4
8
16
32
48
4
8
4
8
16
32
48
8
16
32
48
4
8
16
32
48
4
8
5
4
4
6
1
2
2
1
3
2
1
8
3/4
Yes Yes
25
36
VTLA
5
4
4
6
1
2
2
1
3
2
1
6
2/3
(1)
Yes Yes
21
28
SPDIP,
SOIC,
SSOP
(5)
,
QFN-S
5
4
4
6
1
2
2
—
3
2
1
16
3/4
Yes Yes
53
64
TQFP,
QFN
5
4
4
6
1
2
2
—
3
2
1
9
3/4
Yes Yes
35
44
VTLA
(5)
,
TQFP,
QFN
5
4
4
6
1
2
2
—
3
2
1
8
3/4
Yes Yes
25
36
VTLA
5
4
4
6
1
2
2
—
3
2
1
6
2/3
(1)
SPI
(2)
Device
1024 128
1024 256
1024 512
512
1024
512
1024
32
64
32
64
5
4
4
6
1
2
2
—
3
2
1
6
2/3
(1)
Yes Yes
21
28
SPDIP,
SOIC,
SSOP
(5)
,
QFN-S
5
4
4
6
1
2
2
—
3
2
1
8
3/4
Yes Yes
25
36
VTLA
1024 128
1024 256
1024 512
1024
64
1024 128
1024 256
1024 512
512
1024
32
64
5
4
4
6
1
2
2
—
3
2
1
9
3/4
Yes Yes
35
44
VTLA
(5)
,
TQFP,
QFN
5
4
4
6
1
2
2
—
3
2
1
16
3/4
Yes Yes
53
64
TQFP,
QFN
dsPIC33EP128MC202 1024 128
dsPIC33EP256MC202 1024 256
dsPIC33EP512MC202 1024 512
dsPIC33EP32MC203
dsPIC33EP64MC203
dsPIC33EP32MC204
dsPIC33EP64MC204
512
1024
512
1024
32
64
32
64
Yes Yes
21
28
SPDIP,
SOIC,
SSOP
(5)
,
QFN-S
dsPIC33EP128MC204 1024 128
dsPIC33EP256MC204 1024 256
dsPIC33EP512MC204 1024 512
dsPIC33EP64MC206
1024
64
dsPIC33EP128MC206 1024 128
dsPIC33EP256MC206 1024 256
dsPIC33EP512MC206 1024 512
dsPIC33EP32MC502
dsPIC33EP64MC502
512
1024
32
64
dsPIC33EP128MC502 1024 128
dsPIC33EP256MC502 1024 256
dsPIC33EP512MC502 1024 512
dsPIC33EP32MC503
dsPIC33EP64MC503
Note 1:
2:
3:
4:
5:
512
1024
32
64
On 28-pin devices, Comparator 4 does not have external connections. Refer to
Section 25.0 “Op Amp/Comparator Module”
for details.
Only SPI2 is remappable.
INT0 is not remappable.
Only the PWM Faults are remappable.
The SSOP and VTLA packages are not available for devices with 512 Kbytes of memory.
2011-2013 Microchip Technology Inc.
DS70657G-page 3
Packages
I/O Pins
CTMU
I
2
C™
UART
Pins
PTG
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
TABLE 2:
dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X MOTOR CONTROL
FAMILIES (CONTINUED)
Program Flash Memory (Kbytes)
Page Erase Size (Instructions)
Remappable Peripherals
Quadrature Encoder Interface
10-Bit/12-Bit ADC (Channels)
Op Amps/Comparators
Motor Control PWM
(4)
(Channels)
External Interrupts
(3)
ECAN™ Technology
16-Bit/32-Bit Timers
Output Compare
Input Capture
CRC Generator
RAM (Kbytes)
dsPIC33EP32MC504
dsPIC33EP64MC504
512
1024
32
64
4
8
16
32
48
8
16
32
48
5
4
4
6
1
2
2
1
3
2
1
16
3/4
Yes Yes
53
64
TQFP,
QFN
5
4
4
6
1
2
2
1
3
2
1
9
3/4
Yes Yes
35
44
VTLA
(5)
,
TQFP,
QFN
dsPIC33EP128MC504 1024 128
dsPIC33EP256MC504 1024 256
dsPIC33EP512MC504 1024 512
dsPIC33EP64MC506
1024
64
dsPIC33EP128MC506 1024 128
dsPIC33EP256MC506 1024 256
dsPIC33EP512MC506 1024 512
Note 1:
2:
3:
4:
5:
On 28-pin devices, Comparator 4 does not have external connections. Refer to
Section 25.0 “Op Amp/Comparator Module”
for details.
Only SPI2 is remappable.
INT0 is not remappable.
Only the PWM Faults are remappable.
The SSOP and VTLA packages are not available for devices with 512 Kbytes of memory.
SPI
(2)
Device
DS70657G-page 4
2011-2013 Microchip Technology Inc.
Packages
I/O Pins
CTMU
I
2
C™
UART
Pins
PTG
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
Pin Diagrams
28-Pin SPDIP/SOIC/SSOP
(1,2)
= Pins are up to 5V tolerant
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
V
SS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
RP36/RB4
CV
REF2O
/RP20/T1CK/RA4
V
DD
PGED2/ASDA2/RP37/RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
AV
DD
AV
SS
RPI47/T5CK/RB15
RPI46/T3CK/RB14
RPI45/CTPLS/RB13
RPI44/RB12
TDI/RP43/RB11
TDO/RP42/RB10
V
CAP
V
SS
TMS/ASDA1/SDI1/RP41/RB9
TCK/CV
REF1O
/ASCL1/SDO1/RP40/T4CK/RB8
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
dsPIC33EPXXXGP502
PIC24EPXXXGP202
24
23
22
21
20
19
18
17
16
15
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
V
SS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
FLT32/RP36/RB4
CV
REF2O
/RP20/T1CK/RA4
V
DD
PGED2/ASDA2/RP37/RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
AV
DD
AV
SS
RPI47/PWM1L/T5CK/RB15
RPI46/PWM1H/T3CK/RB14
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
TDI/RP43/PWM3L/RB11
TDO/RP42/PWM3H/RB10
V
CAP
V
SS
TMS/ASDA1/SDI1/RP41/RB9
TCK/CV
REF1O
/ASCL1/SDO1/RP40/T4CK/RB8
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
dsPIC33EPXXXMC202/502
PIC24EPXXXMC202
25
24
23
22
21
20
19
18
17
16
15
Note 1:
2:
The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4
“Peripheral Pin Select”
for available peripherals and for information on limitations.
Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See
Section 11.0 “I/O Ports”
for more information.
2011-2013 Microchip Technology Inc.
DS70657G-page 5
FPGA/CPLD
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