PIC24FJ64GA104 Family
Data Sheet
28/44-Pin, 16-Bit General Purpose
Flash Microcontrollers
with nanoWatt XLP Technology
2010 Microchip Technology Inc.
DS39951C
Note the following details of the code protection feature on Microchip devices:
•
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
•
•
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
K
EE
L
OQ
, K
EE
L
OQ
logo, MPLAB, PIC, PICmicro, PICSTART,
PIC
32
logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN:978-1-60932-440-7
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
®
MCUs and dsPIC
®
DSCs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS39951C-page 2
2010 Microchip Technology Inc.
PIC24FJ64GA104 FAMILY
28/44-Pin, 16-Bit General Purpose Flash Microcontrollers
with nanoWatt XLP Technology
Power Management Modes:
• Selectable Power Management modes with nanoWatt
XLP Technology for Extremely Low Power:
- Deep Sleep mode allows near total power-down
(20 nA typical and 500 nA with RTCC or WDT),
along with the ability to wake-up on external triggers,
or self-wake on programmable WDT or RTCC alarm
- Extreme low-power DSBOR for Deep Sleep,
LPBOR for all other modes
- Sleep mode shuts down peripherals and core for
substantial power reduction, fast wake-up
- Idle mode shuts down the CPU and peripherals for
significant power reduction, down to 4.5
A
typical
- Doze mode enables CPU clock to run slower than
peripherals
- Alternate Clock modes allow on-the-fly switching to
a lower clock speed for selective power reduction
during Run mode, down to 15
A
typical
Special Microcontroller Features
(continued):
• Flash Program Memory:
- 10,000 erase/write cycle endurance (minimum)
- 20-year data retention minimum
- Selectable write protection boundary
• Fail-Safe Clock Monitor Operation:
- Detects clock failure and switches to on-chip
FRC Oscillator
• On-Chip 2.5V Regulator
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
• Two Flexible Watchdog Timers (WDT) for Reliable
Operation:
- Standard programmable WDT for normal operation
- Extreme low-power WDT with programmable
period of 2 ms to 26 days for Deep Sleep mode
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Debug (ICD) via 2 Pins
• JTAG Boundary Scan Support
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator with:
- 4x PLL option
- Multiple divide options
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture:
- 76 base instructions
- Flexible addressing modes
• Linear Program Memory Addressing, up to 12 Mbytes
• Linear Data Memory Addressing, up to 64 Kbytes
• Two Address Generation Units for Separate Read and
Write Addressing of Data Memory
Analog Features:
• 10-Bit, up to 13-Channel Analog-to-Digital (A/D)
Converter:
- 500 ksps conversion rate
- Conversion available during Sleep and Idle
• Three Analog Comparators with Programmable
Input/Output Configuration
• Charge Time Measurement Unit (CTMU):
- Supports capacitive touch sensing for touch
screens and capacitive switches
- Provides high-resolution time measurement and
simple temperature sensing
Special Microcontroller Features:
•
•
•
•
Operating Voltage Range of 2.0V to 3.6V
Self-Reprogrammable under Software Control
5.5V Tolerant Input (digital pins only)
High-Current Sink/Source (18 mA/18 mA) on All I/O pins
Program Memory
(Bytes)
Remappable Peripherals
Compare/PWM
Output
Comparators
10-Bit A/D
(ch)
Remappable
Pins
PMP/PSP
SRAM
(Bytes)
UART w/
IrDA
®
Capture
Input
CTMU
Y
Y
Y
Y
RTCC
Y
Y
Y
Y
I
2
C™
2
2
2
2
Timers
16-Bit
32GA102
64GA102
32GA104
64GA104
28
28
44
44
32K
64K
32K
64K
8K
8K
8K
8K
16
16
26
26
5
5
5
5
5
5
5
5
5
5
5
5
2
2
2
2
SPI
2
2
2
2
PIC24FJ
Device
Pins
10
10
13
13
3
3
3
3
Y
Y
Y
Y
2010 Microchip Technology Inc.
DS39951C-page 3
PIC24FJ64GA104 FAMILY
Peripheral Features:
• Peripheral Pin Select:
- Allows independent I/O mapping of many peripherals
- Up to 26 available pins (44-pin devices)
- Continuous hardware integrity checking and safety
interlocks prevent unintentional configuration changes
• 8-Bit Parallel Master Port (PMP/PSP):
- Up to 16-bit multiplexed addressing, with up to
11 dedicated address pins on 44-pin devices
- Programmable polarity on control lines
- Supports legacy Parallel Slave Port
• Hardware Real-Time Clock/Calendar (RTCC):
- Provides clock, calendar and alarm functions
- Functions even in Deep Sleep mode
• Two 3-Wire/4-Wire SPI modules (support 4 Frame
modes) with 8-Level FIFO Buffer
• Two I
2
C™ modules support Multi-Master/Slave mode
and 7-Bit/10-Bit Addressing
• Two UART modules:
- Supports RS-485, RS-232 and LIN/J2602
- On-chip hardware encoder/decoder for IrDA
®
- Auto-wake-up on Start bit
- Auto-Baud Detect (ABD)
- 4-level deep FIFO buffer
• Five 16-Bit Timers/Counters with Programmable
Prescaler
• Five 16-Bit Capture Inputs, each with a Dedicated Time
Base
• Five 16-Bit Compare/PWM Outputs, each with a
Dedicated Time Base
• Programmable, 32-Bit Cyclic Redundancy Check (CRC)
Generator
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to 3 External Interrupt Sources
Pin Diagrams
28-Pin SPDIP, SOIC, SSOP
(1)
MCLR
AN0/C3INC/V
REF
+/CN2/CTED1/RA0
AN1/C3IND/V
REF
-/CN3/CTED2/RA1
PGED1/AN2/C2INB/RP0/CN4/RB0
PGEC1/AN3/C2INA/RP1/CN5/RB1
AN4/C1INB/RP2/SDA2/CN6/RB2
AN5/C1INA/RP3/SCL2/CN7/RB3
V
SS
OSCI/CLKI/C1IND/CN30/RA2
OSCO/CLKO/PMA0/CN29/RA3
SOSCI/C2IND/RP4/PMBE/CN1/RB4
SOSCO/SCLKI/T1CK/C2INC/CN0/PMA1/RA4
V
DD
(2)
PGED3/RP5/ASDA1 /CN27/PMD7/RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
V
SS
AN9/C3INA/RP15/CN11/PMCS1/RB15
AN10/C3INB/CVREF/RTCC/RP14/CN12/PMWR/RB14
AN11/C1INC/RP13/CN13/PMRD/REFO/RB13
AN12/RP12/CN14/PMD0/RB12
PGEC2/TMS/RP11/CN15/PMD1/RB11
PGED2/TDI/RP10/CN16/PMD2/RB10
V
CAP
/V
DDCORE
DISVREG
TDO/RP9/SDA1/CN21/PMD3/RB9
TCK/RP8/SCL1/CN22/PMD4/RB8
RP7/INT0/CN23/PMD5/RB7
PGC3/EMUC3/RP6/ASCL1
(2)
/CN24/PMD6/RB6
PIC24FJXXGA102
Legend:
Note 1:
2:
RPn
represents remappable peripheral pins.
Gray shading indicates 5.5V tolerant input pins.
Alternative multiplexing for SDA1 and SCL1 when the I2C1SEL bit is set.
DS39951C-page 4
2010 Microchip Technology Inc.
PIC24FJ64GA104 FAMILY
Pin Diagrams
28-Pin QFN
(1,3)
28 27 26 25 24 23 22
PGED1/AN2/C2INB/RP0/CN4/RB0
PGEC1/AN3/C2INA/RP1/CN5/RB1
AN4/C1INB/SDA2/RP2/CN6/RB2
AN5/C1INA/SCL2/RP3/CN7/RB3
V
SS
OSCI/CLKI/C1IND/CN30/RA2
OSCO/CLKO/CN29/PMA0/RA3
1
2
3
4
5
6
7
21
20
19
18
17
16
15
AN11/C1INC/RP13/CN13/PMRD/REFO/RB13
AN12/RP12/CN14/PMD0/RB12
PGEC2/TMS/RP11/CN15/PMD1/RB11
PGED2/TDI/RP10/CN16/PMD2/RB10
V
CAP
/V
DDCORE
DISVREG
TDO/RP9/SDA1/CN21/PMD3/RB9
PIC24FJXXGA102
8
SOSCI/C2IND/RP4/PMBE/CN1/RB4
9 10 11 12 13 14
SOSCO/SCLKI/T1CK/C2INC/CN0/PMA1/RA4
V
DD
PGED3/RP5/ASDA1(2)/CN27/PMD7/RB5
PGEC3/RP6/ASCL1(2)/CN24/PMD6/RB6
RP7/INT0/CN23/PMD5/RB7
TCK/RP8/SCL1/CN22/PMD4/RB8
Legend:
Note 1:
2:
3:
RPn
represents remappable peripheral pins.
Gray shading indicates 5.5V tolerant input pins.
Alternative multiplexing for SDA1 and SCL1 when the I2C1SEL bit is set.
The back pad on QFN devices should be connected to V
SS
.
2010 Microchip Technology Inc.
V
DD
V
SS
AN9/C3INA/RP15/CN11/PMCS1/RB15
AN10/C3INB/CV
REF
/RTCC/RP14/CN12/PMWR/RB14
AN1/C3IND/V
REF
-/CN3/CTED2/RA1
AN0/C3INC/V
REF
+/CN2/CTED1/RA0
MCLR
DS39951C-page 5
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