PK10X512VMD50R datasheet, PDF - EEWORLD Datasheet

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PK10X512VMD50R: DescriptionK10 Sub-Family Data Sheet; File Size839KB，60 Pages; ManufacturerFREESCALE (NXP)

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PK10X512VMD50R Overview

K10 Sub-Family Data Sheet

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Freescale Semiconductor

Data Sheet: Product Preview

Document Number: K10P81M100SF2

Rev. 1, 11/2010

K10 Sub-Family Data Sheet

Features

• Operating Characteristics

– Voltage range: 1.71 to 3.6 V

– Flash write voltage range: 1.71 to 3.6 V

– Temperature range (ambient): -40 to 105°C

K10P81M100SF2

Supports the following:

MK10N512VLK100, MK10N512VMB100

• Human-machine interface

– Low-power hardware touch sensor interface (TSI)

– General-purpose input/output

• Analog modules

– 16-bit SAR ADC with PGA (x64)

– 12-bit DAC

– Analog comparator (CMP) containing a 6-bit DAC

and programmable reference input

– Voltage reference

• Timers

– Programmable delay block

– Eight-channel motor control/general purpose/PWM

timers

– Two-channel quadrature decoder/general purpose

timers

– Periodic interrupt timers

– 16-bit low-power timer

– Carrier modulator transmitter

– Real-time clock

• Communication interfaces

– Controller Area Network (CAN) module

– SPI modules

– I2C modules

– UART modules

– Secure Digital host controller (SDHC)

– I2S

• Performance

– Up to 100 MHz ARM Cortex-M4 core with DSP

instructions delivering 1.25 Dhrystone MIPS per

MHz

• Memories and memory interfaces

– Up to 512 KB program flash memory on non-

FlexMemory devices

– Up to 128 KB RAM

– Serial programming interface (EzPort)

– FlexBus external bus interface

• Clocks

– 1 to 32 MHz crystal oscillator

– 32 kHz crystal oscillator

– Multi-purpose clock generator

• System peripherals

– 10 low-power modes to provide power optimization

based on application requirements

– Memory protection unit with multi-master

protection

– 16-channel DMA controller, supporting up to 64

request sources

– External watchdog monitor

– Software watchdog

– Low-leakage wakeup unit

• Security and integrity modules

– Hardware CRC module to support fast cyclic

redundancy checks

– Hardware random-number generator

– 128-bit unique identification (ID) number per chip

This document contains information on a product under development. Freescale

reserves the right to change or discontinue this product without notice.

Preliminary

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