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PUMD48

Description
NPN/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ
CategoryDiscrete semiconductor    The transistor   
File Size104KB,12 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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PUMD48 Overview

NPN/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ

PUMD48 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSC-88
package instructionPLASTIC, SC-88, 6 PIN
Contacts6
Reach Compliance Codecompli
ECCN codeEAR99
Other featuresBUILT IN BIAS RESISTANCE RATIO IS 21.36
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)80
JESD-30 codeR-PDSO-G6
JESD-609 codee3
Humidity sensitivity level1
Number of components2
Number of terminals6
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeNPN AND PNP
Maximum power dissipation(Abs)0.2 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature30
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
PEMD48; PUMD48
NPN/PNP resistor-equipped transistors;
R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ
Rev. 05 — 13 April 2010
Product data sheet
1. Product profile
1.1 General description
NPN/PNP double Resistor-Equipped Transistors (RET) in small Surface-Mounted
Device (SMD) plastic packages.
Table 1.
Product overview
Package
NXP
PEMD48
PUMD48
SOT666
SOT363
JEITA
-
SC-88
Package
configuration
ultra small and flat lead
very small
Type number
1.2 Features and benefits
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
1.3 Applications
Low current peripheral driver
Replacement of general-purpose transistors in digital applications
Control IC inputs
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
O
R1
R2/R1
R1
R2/R1
Quick reference data
Parameter
collector-emitter voltage
output current
bias resistor 1 (input)
bias resistor ratio
bias resistor 1 (input)
bias resistor ratio
Conditions
open base
Min
-
-
33
0.8
1.54
17
Typ
-
-
47
1
2.2
21
Max
50
100
61
1.2
2.86
26
Unit
V
mA
Per transistor; for the PNP transistor with negative polarity
Transistor TR1 (NPN)
Transistor TR2 (PNP)

PUMD48 Related Products

PUMD48 PEMD48
Description NPN/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ NPN/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
package instruction PLASTIC, SC-88, 6 PIN ULTRA SMALL, PLASTIC, 6 PIN
Contacts 6 6
Reach Compliance Code compli compli
ECCN code EAR99 EAR99
Other features BUILT IN BIAS RESISTANCE RATIO IS 21.36 BUILT IN BIAS RESISTANCE RATIO IS 1
Maximum collector current (IC) 0.1 A 0.1 A
Collector-emitter maximum voltage 50 V 50 V
Configuration SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE) 80 80
JESD-30 code R-PDSO-G6 R-PDSO-F6
JESD-609 code e3 e3
Humidity sensitivity level 1 1
Number of components 2 2
Number of terminals 6 6
Maximum operating temperature 150 °C 150 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260
Polarity/channel type NPN AND PNP NPN AND PNP
Maximum power dissipation(Abs) 0.2 W 0.3 W
Certification status Not Qualified Not Qualified
surface mount YES YES
Terminal surface Tin (Sn) Tin (Sn)
Terminal form GULL WING FLAT
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
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