DISCRETE SEMICONDUCTORS
DATA SHEET
M3D750
BLF1820-40
UHF power LDMOS transistor
Preliminary specification
2001 Aug 10
Philips Semiconductors
Preliminary specification
UHF power LDMOS transistor
FEATURES
•
High power gain
•
Easy power control
•
Excellent ruggedness
•
Designed for broadband operation (1.8 to 2 GHz)
•
Internal input and output matching for high gain and
efficiency
•
Improved linearity at backoff levels.
1
BLF1820-40
PINNING
PIN
1
2
3
drain
gate
source, connected to flange
DESCRIPTION
APPLICATIONS
•
Common source class-AB operation for PCN and PCS
applications in the 1800 to 2000 MHz frequency range
•
Suitable for GSM, Edge, CDMA and WCDMA
applications.
DESCRIPTION
Silicon N-channel enhancement mode lateral D-MOS
transistors encapsulated in a 2-lead SOT608A flange
package with a ceramic cap. The common source is
connected to the mounting flange.
Fig.1 Simplified outline SOT608A.
2
Top view
MBL290
3
QUICK REFERENCE DATA
RF performance at T
h
= 25
°C
in a common source test circuit.
MODE OF OPERATION
Two-tone, class-AB
f
(MHz)
f
1
= 2000; f
2
= 2000.1
V
DS
(V)
26
P
L
(W)
40 (PEP)
G
p
(dB)
>10.5
η
D
(%)
>30
d
im
(dBc)
≤−25
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
V
DS
V
GS
I
D
T
stg
T
j
PARAMETER
drain-source voltage
gate-source voltage
DC drain current
storage temperature
junction temperature
−
−
−
−65
−
MIN.
65
±15
5
+150
200
MAX.
V
V
A
°C
°C
UNIT
2001 Aug 10
2
Philips Semiconductors
Preliminary specification
UHF power LDMOS transistor
THERMAL CHARACTERISTICS
SYMBOL
R
th j-h
Note
1. Determined under specified RF operating conditions.
CHARACTERISTICS
T
j
= 25
°C
unless otherwise specified.
SYMBOL
V
(BR)DSS
V
GSth
I
DSS
I
DSX
I
GSS
g
fs
R
DSon
C
rss
PARAMETER
drain-source breakdown voltage
gate-source threshold voltage
drain-source leakage current
on-state drain current
gate leakage current
forward transconductance
drain-source on-state resistance
feedback capacitance
CONDITIONS
V
GS
= 0; I
D
= 1 mA
V
DS
= 10 V; I
D
= 90 mA
V
GS
= 0; V
DS
= 26 V
V
GS
= V
GS th
+ 9 V; V
DS
= 10 V
V
GS
=
±15
V; V
DS
= 0
V
DS
= 10 V; I
D
= 3 A
V
GS
= V
GS th
+ 9 V; I
D
= 3 A
V
GS
= 0; V
DS
= 26 V; f = 1 MHz
MIN.
65
−
−
13
−
−
−
−
PARAMETER
thermal resistance from junction to
heatsink
CONDITIONS
T
h
= 25
°C,
P
tot
= 152 W, note 1
VALUE
2.3
BLF1820-40
UNIT
K/W
TYP.
−
5
−
14
−
2.5
0.25
1.7
MAX.
−
−
5
−
30
−
−
−
UNIT
V
V
µA
A
nA
S
Ω
pF
APPLICATION INFORMATION
RF performance in a common source class-AB circuit. T
h
= 25
°C;
R
th j-h
= 1.15 K/W, unless otherwise specified.
MODE OF OPERATION
Two-tone, class-AB
f
(MHz)
f
1
= 2000; f
2
= 2000.1
V
DS
(V)
26
I
DQ
(mA)
300
P
L
(W)
40 (PEP)
G
p
(dB)
>10.5
η
D
(%)
>30
d
im
(dBc)
≤−25
Ruggedness in class-AB operation
The BLF1820-40 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under
the following conditions: V
DS
= 26 V; I
DQ
= 300 mA; P
L
= 40 W; f = 2 000 MHz.
2001 Aug 10
3
Philips Semiconductors
Preliminary specification
UHF power LDMOS transistor
BLF1820-40
15
G
P
(dB)
G
P
60
η
D
(%)
0
d
3
(dBc)
-20
10
η
D
40
-40
I
DQ
=260mA
300mA
5
20
-60
340mA
0
0
20
40
60
0
80
100
P
L
(PEP) (W)
-80
0
20
40
60
80
100
P
L
(PEP) (W)
V
DS
= 26 V; I
DQ
= 300 mA; f
1
= 2000 MHz; f
2
= 2000.1 MHz.
V
DS
= 26 V; f
1
= 2000 MHz; f
2
= 2000.1 MHz.
Fig.2
Power gain and efficiency as functions of
peak envelope load power, typical values.
Fig.3
Intermodulation distortion as a function of
peak envelope load power, typical values.
0
d
im
(dBc)
-20
d
3
d
5
-40
d
7
-60
-80
0
20
40
60
80
100
P
L
(PEP) (W)
V
DS
= 26 V; I
DQ
= 300 mA; f
1
= 2000 MHz; f
2
= 2000.1 MHz.
Fig.4
Intermodulation distortion as a function of
peak envelope load power, typical values.
2001 Aug 10
4
Philips Semiconductors
Preliminary specification
UHF power LDMOS transistor
BLF1820-40
Vdd
C21
C20
L1
C19
C6
Vgate
L6
C14
C13
C15
C16
C17
C18
C7
L4
L8
L10
C11
Output
50 Ohm
C5
L1
L2
L3
L5
L9
L11
L12
Output
50 Ohm
C4
C1
C3
C2
C10
C8
C9
C12
L7
Fig.5 Class AB test circuit. at f = 2 GHz
List of components
COMPONENT
C1, C2, C8, C9
C3
C4, C5, C11, C12
C6, C13
C7, C20, C21
C10
C14
C15
C16
C17
C18
C19
L1, L12
L2
L3, L9
L4, L10
L5
L6, L7
L8
L11
Notes
1. American Technical Ceramics type 100A or capacitor of same quality.
2. American Technical Ceramics type 100B or capacitor of same quality.
3. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (εr = 6.15); thickness = 25 mils.
2001 Aug 10
5
DESCRIPTION
Tekelec trimmer; type 37271
VALUE
0.6 to 4.5 pF
DIMENSIONS
CATALOGUE No.
multilayer ceramic chip capacitor; note 1 1.5 pF
multilayer ceramic chip capacitor; note 1 6.8 pF
multilayer ceramic chip capacitor; note 2 12 pF
electrolytic capacitor
100
µF;
63 V
2222 037 58101
multilayer ceramic chip capacitor; note 1 1 pF
multilayer ceramic chip capacitor; note 1 10 pF
multilayer ceramic chip capacitor; note 1 20 pF
multilayer ceramic chip capacitor; note 1 120 pF
Philips SMD capacitor
electrolytic capacitor
stripline; note 3
stripline; note 3
stripline; note 3
stripline; note 3
stripline; note 3
stripline; note 3
stripline; note 3
stripline; note 3
9.0
Ω
40.9
Ω
211 x 10 mm
3.2 x 20 mm
9.7
Ω
100 nF
47
µF;
35 V
50
Ω
42.8
Ω
29.4
Ω
2.4 x 12 mm
3.0 x 18 mm
5.0 x 4.0 mm
2.0 x 25 mm
18.4 x 5.0 mm
multilayer ceramic chip capacitor; note 2 6.8 nF
Microcontroller MCU
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