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5962-01-283-4329

Description
Standard SRAM, 64KX1, 70ns, CMOS, CDIP22
Categorystorage    storage   
File Size92KB,8 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

5962-01-283-4329 Overview

Standard SRAM, 64KX1, 70ns, CMOS, CDIP22

5962-01-283-4329 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
package instructionDIP, DIP22,.3
Reach Compliance Codenot_compliant
ECCN code3A001.A.2.C
Maximum access time70 ns
I/O typeSEPARATE
JESD-30 codeR-XDIP-T22
memory density65536 bit
Memory IC TypeSTANDARD SRAM
memory width1
Number of terminals22
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize64KX1
Output characteristics3-STATE
Package body materialCERAMIC
encapsulated codeDIP
Encapsulate equivalent codeDIP22,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Certification statusNot Qualified
Filter level38535Q/M;38534H;883B
Maximum standby current0.02 A
Minimum standby current4.5 V
Maximum slew rate0.12 mA
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperature6
CMOS Static RAM
64K (64K x 1-Bit)
Description
IDT7187S
IDT7187L
x
Features
High speed (equal access and cycle time)
– Military: 25/35/45/55/70/85ns (max.)
Low power consumption
Battery backup operation—2V data retention
(L version only)
JEDEC standard high-density 22-pin ceramic
DIP packaging
Produced with advanced CMOS high-performance
technology
Separate data input and output
Input and output directly TTL-compatible
Military product compliant to MIL-STD-883, Class B
x
x
x
x
x
x
x
The IDT7187 is a 65,536-bit high-speed static RAM organized as 64K
x 1. It is fabricated using IDT’s high-performance, high-reliability CMOS
technology. Access times as fast as 25ns are available.
Both the standard (S) and low-power (L) versions of the IDT7187
provide two standby modes—I
SB
and I
SB1
. I
SB
provides low-power
operation; I
SB1
provides ultra-low-power operation. The low-power (L)
version also provides the capability for data retention using battery
backup. When using a 2V battery, the circuit typically consumes only
30µW.
Ease of system design is achieved by the IDT7187 with full
asynchronous operation, along with matching access and cycle times.
The device is packaged in an industry standard 22-pin, 300 mil ceramic
DIP.
Military grade product is manufactured in compliance with the latest
revision of MIL-STD-883, Class B, making it ideally suited to military
temperature applications demanding the highest level of performance
and reliability.
Functional Block Diagram
A
A
V
CC
A
A
A
A
A
CS
DATA
IN
COLUMN I/O
DATA
OUT
ROW
SELECT
65,536-BIT
MEMORY ARRAY
GND
WE
A
A
A
A
A
A
A
2986 drw 01
FEBRUARY 2001
1
©2000 Integrated Device Technology, Inc.
DSC-2986/09
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