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SN74LS640DW

Description
LS SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO20
Categorylogic    logic   
File Size50KB,3 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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SN74LS640DW Overview

LS SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO20

SN74LS640DW Parametric

Parameter NameAttribute value
MakerMotorola ( NXP )
Parts packaging codeSOIC
package instructionSOP,
Contacts20
Reach Compliance Codeunknow
Other featuresWITH COMMON OUTPUT ENABLE AND DIRECTION CONTROL
seriesLS
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length12.8 mm
Load capacitance (CL)45 pF
Logic integrated circuit typeBUS TRANSCEIVER
Number of digits8
Number of functions1
Number of ports2
Number of terminals20
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Maximum supply current (ICC)90 mA
propagation delay (tpd)15 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width7.5 mm
OCTAL BUS TRANSCEIVERS
These octal bus transceivers are designed for asynchronous two-way
communication between data buses. Control function implementation
minimizes external timing requirements. These circuits allow data transmis-
sion from the A bus to B or from the B bus to A bus depending upon the logic
level of the direction control (DIR) input. Enable input (G) can disable the
device so that the buses are effectively isolated.
DEVICE
LS640
LS641
LS642
LS645
OUTPUT
3-State
Open-Collector
Open-Collector
3-State
LOGIC
Inverting
True
Inverting
True
SN54/74LS640
SN54/74LS641
SN54/74LS642
SN54/74LS645
OCTAL BUS TRANSCEIVERS
LOW POWER SCHOTTKY
FUNCTION TABLE
CONTROL
INPUTS
G
L
L
H
DIR
L
H
X
LS640
LS642
B data to A bus
A data to B bus
Isolation
OPERATION
LS641
LS645
B data to A bus
A data to B bus
Isolation
20
1
J SUFFIX
CERAMIC
CASE 732-03
20
1
N SUFFIX
PLASTIC
CASE 738-03
H = HIGH Level, L = LOW Level, X = Irrelevant
20
1
DW SUFFIX
SOIC
CASE 751D-03
ORDERING INFORMATION
SN54LSXXXJ
Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC
CONNECTION DIAGRAMS DIP
(TOP VIEW)
ENABLE
B1
VCC G
20 19 18
B2
17
B3
16
B4
15
B5
14
B6
13
B7
12
B8
11
ENABLE
B1
VCC G
20 19 18
B2
17
B3
16
B4
15
B5
14
B6
13
B7
12
B8
11
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND
SN54 / 74LS640
SN54 / 74LS642
SN54 / 74LS641
SN54 / 74LS645
FAST AND LS TTL DATA
5-1

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