EEWORLDEEWORLDEEWORLD

Part Number

Search

3199EF124S025MXS1

Description
Aluminum Electrolytic Capacitor, Polarized, Aluminum (wet), 25V, 30% +Tol, 10% -Tol, 120000uF, Stud Mount, CAN, ROHS COMPLIANT
CategoryPassive components    capacitor   
File Size426KB,4 Pages
ManufacturerCDE [ CORNELL DUBILIER ELECTRONICS ]
Environmental Compliance  
Download Datasheet Parametric View All

3199EF124S025MXS1 Overview

Aluminum Electrolytic Capacitor, Polarized, Aluminum (wet), 25V, 30% +Tol, 10% -Tol, 120000uF, Stud Mount, CAN, ROHS COMPLIANT

3199EF124S025MXS1 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instruction,
Reach Compliance Codecompliant
ECCN codeEAR99
capacitance120000 µF
Capacitor typeALUMINUM ELECTROLYTIC CAPACITOR
diameter50.8 mm
dielectric materialsALUMINUM (WET)
ESR4 mΩ
length117.5 mm
Manufacturer's serial number3199
Installation featuresSTUD MOUNT
negative tolerance10%
Number of terminals2
Maximum operating temperature85 °C
Minimum operating temperature-55 °C
Package shapeCYLINDRICAL PACKAGE
Package formScrew Ends
polarityPOLARIZED
positive tolerance30%
Rated (DC) voltage (URdc)25 V
ripple current21300 mA
series3199
surface mountNO
Terminal pitch22.2 mm
Terminal shapeBINDING POST
Type 3199
Aluminum Electrolytic, Screw Terminals, Switching and Audio Output
Screw Terminal Capacitors for Power Output Filtering
With twice the capacitance of Type 3191 capacitor,
Type 3199 extends output filtering performance into
higher power, especially with cold temperature require-
ments. It’s available with the capacitor element pot-
ted in place for lowest cost or secured by rills, spoon
shaped dimples in the side of the can. Rilled construc-
tion offers high vibration and shock withstanding and
excellent heat transfer for higher ripple current.
Outline Drawing
Highlights
Stud mount available
High current application
Industrial applications
Smoothing and filtering
Audio power supplies
Specifications
Operating Temperature:
–55 to + 85 ºC
Rated Voltage:
7.5 Vdc to 75 Vdc
Capacitance Range:
3900 µF to 1.2 F
Capacitance Tolerance:
–10 to + 30%; –10 to +50%; ±20%
Ripple Current Multiplier:
Ambient Temperature
Temperature
I
R
Multiplier
45 ºC
2.24
60 Hz
0.90
55 ºC
2.00
120 Hz
1.00
65 ºC
1.73
300 Hz
1.05
75 ºC
1.41
85 ºC
1.00
Frequency
Frequency
I
R
Multiplier
1000 Hz
≥10
Khz
1.10
1.15
Complies with the EU Directive
2002/95/EC requirement restricting
the use of Lead (Pb), Mercury (Hg),
Cadmium (Cd), Hexavalent chromium
(Cr(VI)), PolyBrominated Biphenyls
(PBB) and PolyBrominated Diphenyl
Ethers (PBDE).
Life Test:
Endurance, 5000 h at rated voltage and 85 ºC
Δ Capacitance: ±10%
ESR ≤ 200% of limit
DCL ≤ 100% of limit
Shelf Life:
Storage, 500 h at 85 ºC
Δ Capacitance: ±10%
ESR ≤ 175% of limit
DCL ≤ 200% of limit
Vibration:
10 to 500 Hz, 0.75 mm or 10 g* if less,
3 directions, 2 h ea
Δ Capacitance: ±5%
no visible damage or leakage
*15 g if rilled construction
CDM Cornell Dubilier • 140 Technology Place. • Liberty, SC • 29657 • Phone: (864)843-2277 • Fax: (864)843-3800 • www.cde.com
How do you know what power dissipation you need to choose for a diode in a circuit?
There is no specific circuit mentioned, but I just studied the parameters of the diode and found that the power dissipation parameter seems to be around 1W. Assuming a reverse connection protection ci...
sky999 PCB Design
100 classic questions and answers for Siemens S7-300 PLC from entry to mastery
1: How can you avoid "communication failure" messages when using CPU 315F and ET 200S? With CPU S7 315F, ET 200S and fail-safe DI/DO modules, you call the fail-safe program of OB35. In addition, you h...
eeleader Industrial Control Electronics
Intel FPGA 2019 Engineer Application Video
2019 Intel FPGA Engineer Application Video! The content mainly focuses on the troubles of FPGA engineers, and teaches everyone how to solve some common problems and imparts tips.Let’s take a look at w...
EE大学堂 Training Edition
Urgent! The FPGA's JTAG port is not functioning properly!
I made a new board, using alterad cyclone iii. As soon as the chip was soldered in, the TCK of the JTAG port was shorted to GND, and the program could not be downloaded. It is said on the Internet tha...
lijinhua1990 FPGA/CPLD
How to design a high frequency low pass filter
I want to make a signal source using DDS, but I encountered some problems when outputting the filter. Due to limited experimental conditions, I cannot simulate the real object, so I can only simulate ...
linda_xia Analog electronics
Frequency measurement
If there is an 80M sine wave, how can we measure the frequency when the frequency is unknown?...
20151997 Electronics Design Contest

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 472  1582  1678  236  1756  10  32  34  5  36 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号