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SN74LS166N

Description
LOW POWER SCHOTTKY
Categorylogic    logic   
File Size134KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric Compare View All

SN74LS166N Overview

LOW POWER SCHOTTKY

SN74LS166N Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeDIP
package instructionPLASTIC, DIP-16
Contacts16
Reach Compliance Codenot_compliant
Counting directionRIGHT
seriesLS
JESD-30 codeR-PDIP-T16
JESD-609 codee0
length19.175 mm
Logic integrated circuit typePARALLEL IN SERIAL OUT
Maximum Frequency@Nom-Sup25000000 Hz
Number of digits8
Number of functions1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
propagation delay (tpd)35 ns
Certification statusNot Qualified
Maximum seat height4.44 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width7.62 mm
minfmax25 MHz
Base Number Matches1
SN74LS166
8-Bit Shift Registers
The SN74LS166 is an 8-Bit Shift Register. Designed with all inputs
buffered, the drive requirements are lowered to one 74LS standard
load. By utilizing input clamping diodes, switching transients are
minimized and system design simplified.
The LS166 is a parallel-in or serial-in, serial-out shift register and
has a complexity of 77 equivalent gates with gated clock inputs and an
overriding clear input. The shift/load input establishes the parallel-in
or serial-in mode. When high, this input enables the serial data input
and couples the eight flip-flops for serial shifting with each clock
pulse. Synchronous loading occurs on the next clock pulse when this is
low and the parallel data inputs are enabled. Serial data flow is
inhibited during parallel loading. Clocking is done on the low-to-high
level edge of the clock pulse via a two input positive NOR gate, which
permits one input to be used as a clock enable or clock inhibit function.
Clocking is inhibited when either of the clock inputs are held high,
holding either input low enables the other clock input. This will allow
the system clock to be free running and the register stopped on
command with the other clock input. A change from low-to-high on
the clock inhibit input should only be done when the clock input is
high. A buffered direct clear input overrides all other inputs, including
the clock, and sets all flip-flops to zero.
http://onsemi.com
LOW
POWER
SCHOTTKY
16
1
Synchronous Load
Direct Overriding Clear
Parallel to Serial Conversion
GUARANTEED OPERATING RANGES
Symbol
V
CC
T
A
I
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current – High
Output Current – Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
– 0.4
8.0
Unit
V
°C
mA
mA
16
PLASTIC
N SUFFIX
CASE 648
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
SN74LS166N
SN74LS166D
Package
16 Pin DIP
16 Pin
Shipping
2000 Units/Box
2500/Tape & Reel
©
Semiconductor Components Industries, LLC, 1999
1
December, 1999 – Rev. 6
Publication Order Number:
SN74LS166/D

SN74LS166N Related Products

SN74LS166N SN74LS166D SN74LS166
Description LOW POWER SCHOTTKY LOW POWER SCHOTTKY LOW POWER SCHOTTKY
Is it Rohs certified? incompatible incompatible -
Parts packaging code DIP SOIC -
package instruction PLASTIC, DIP-16 SOP, SOP16,.25 -
Contacts 16 16 -
Reach Compliance Code not_compliant _compli -
Counting direction RIGHT RIGHT -
series LS LS -
JESD-30 code R-PDIP-T16 R-PDSO-G16 -
JESD-609 code e0 e0 -
length 19.175 mm 9.9 mm -
Logic integrated circuit type PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT -
Number of digits 8 8 -
Number of functions 1 1 -
Number of terminals 16 16 -
Maximum operating temperature 70 °C 70 °C -
Output polarity TRUE TRUE -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code DIP SOP -
Encapsulate equivalent code DIP16,.3 SOP16,.25 -
Package shape RECTANGULAR RECTANGULAR -
Package form IN-LINE SMALL OUTLINE -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
power supply 5 V 5 V -
propagation delay (tpd) 35 ns 35 ns -
Certification status Not Qualified Not Qualified -
Maximum seat height 4.44 mm 1.75 mm -
Maximum supply voltage (Vsup) 5.25 V 5.25 V -
Minimum supply voltage (Vsup) 4.75 V 4.75 V -
Nominal supply voltage (Vsup) 5 V 5 V -
surface mount NO YES -
technology TTL TTL -
Temperature level COMMERCIAL COMMERCIAL -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form THROUGH-HOLE GULL WING -
Terminal pitch 2.54 mm 1.27 mm -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
Trigger type POSITIVE EDGE POSITIVE EDGE -
width 7.62 mm 3.9 mm -
minfmax 25 MHz 25 MHz -
Base Number Matches 1 1 -

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