Specification : TS-S96D048F
July, 2001
Technical Specification
for
2.5Gbps Fiber Optic Transmitter Module
SDT8028-T_-Q_
155.52Mb/s
Short Haul
Intermediate Reach
Single 5.0 V
1.3 µm
Transmitter
(
622.08Mb/s
Long Haul
Long Reach
Single 3.3 V
1.55 µm
Receiver
2R /
3R )
(
2488.32Mbps
other __________
Intra Office
other __________
Short Reach
other __________
other __________
Transceiver
2R /
3R )
Sumitomo Electric reserves the right to make changes in the specification without prior notice.
#
Safety Precaution
Symbols
This specification uses various picture symbols to prevent possible injury to operator or
other persons or damage to properties for appropriate use of the product. The symbols and definitions are as shown below. Be sure to be
familiar with these symbols before reading this specification.
Warning
Caution
Wrong operation without following this instruction may lead to human death or serious injury.
Wrong operation without following this instruction may lead to human injury or property damage.
indicates prohibition of actions. Action details are explained thereafter.
indicates compulsory actions or instructions. Action details are explained thereafter.
Example of picture symbols
(SDT8028-T_-Q_)
-1/9-
Specification : TS-S96D048F
July, 2001
1. General
The features of SDT8028-T_-Q_ are listed below:
* SDH STM-16 I-16 / SONET OC-48 SR-1 Compliant
* Power Supply Voltage
Single +5V ( or -5V )
* Low Power Supply Current
150mA (typ.)
* Compact Package Size
36 X 15 X 9 mm
* Pin Configuration
24 pin Dual in Line
* Uncooled Laser Diode with Automatic Optical Power Control Circuit
* Laser Diode
1300nm InGaAsP / InP, FP-LD
* Optical Output Shut-down Function (Disable Function)
* Laser Bias Current Alarm Function.
* Laser Bias Monitor / Rear Facet Monitor Function.
* Clocked / Non-clocked mode selector
* Optical Connector Interface
FC / SC / MU connector
2. Block Diagram
M o n it o r
P IN -P D
LD
TD
VTTD
TDb
I np u t
B u ff e r
D F /F
1
M o d u la t ion
C irc uit
0
B M (+ )
B M (-)
R FM (+ )
R FM (- )
A LM
TCLK
VTTC
TCLK b
S e le c t o r
D is a b le
I np u t
B u ff e r
B ia s
C irc uit
A u to m a tic
P ower
C on t ro l C ir c u it
Figure 1. Block Diagram
*C lo c k e d O p e r at io n M o d e
(V s = V s lc t )
D at a I n p u t
TD
H
L
φ
O pt ic a l
H
L
*N on - C lo c k e d O p e ra tio n M od e
(V s = V n s lc t )
D a t a I n p ut
O pt ic a l
TD
H
L
TDb
L
H
O ut p u t
H
L
TDb
L
H
φ
T C L K T C L K b O ut p u t
L
H
Q0
H :H ig h L e v e l, L :L o w L e v el
H :H ig h L ev e l, L :L o w L e v e l,
φ
:H or L
Q 0: P re v iou s o p tic a l o u t pu t s ta t u s
b e fo r e d a ta in p u t c o n d itio n d e f in e d
(SDT8028-T_-Q_)
-2/9-
Specification : TS-S96D048F
July, 2001
3. Package Dimension
PIN24
PIN13
14.32
-0.2
+0.1
15.24
t=0.25
-0.05
+0.3
φ
4.9
+0.2
-0.2
φ0.9
+0.2
-0.2
+0.2
-0.2
φ6.8
8.9
+0.1
-0.2
PIN1
36.4
-0.1
+0.2
PIN12
1.5
-0.1
+0.2
4.2
-0.5
2.54PX11=27.94
600+/-50
23.5
-0.1
+0.1
+0.5
3.9
0.5
-0.05
pin dimension
UNIT:mm
+0.1
14.4
-0.1
+0.1
Figure 2. Package Dimension
Figure 2. Package Dimension
Caution
Do not disassemble this product. Otherwise, failure, electrical shock, overheating or fire may occur.
Handle the lead pins carefully. Use assisting tools or prospective aids as required. A lead pin may injure skin or human body
4. Pin Assignment
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
Vcc
Vcc
RFM(+)
RFM(-)
TDb
VTTD
TD
NC
Vcc
Vcc
Vee
Vee
Vee
Vee
ALM
Disable
Selector
TCLK
VTTC
TCLKb
BM(-)
BM(+)
Vcc
Vcc
I/O
Level
+5V
+5V
Analog
Analog
PECL
Vcc-2V
(AC GND)
PECL
+5V
+5V
GND
GND
GND
GND
TTL
TTL
Description
Positive power supply (+5V)
Rear facet PD current monitor voltage (positive)
Rear facet PD current monitor voltage (negative)
Differential data input (negative)
Data input signal termination, Vcc-2V supply for DC PECL interface.
Or pull down to GND via a capacitor for AC coupled interface.
Differential data input (positive)
No user connection
Positive power supply (+5V)
Positive power supply (+5V)
Negative power supply (GND)
Negative power supply (GND)
Negative power supply (GND)
Negative power supply (GND)
LD bias current alarm, normal low, active high
Transmitter disable input. Default (open) LOW and transmitter is enabled.
Signal input mode selector, clocked or non-clocked.
Default (open) LOW and clocked mode.
Differential clock input (positive)
Clock input signal termination, Vcc-2V supply for DC PECL interface.
Or pull down to GND via a capacitor for AC coupled interface
Differential clock input (negative)
LD bias current monitor voltage (negative)
LD bias current monitor voltage (positive)
Positive power supply (+5V)
Positive power supply (+5V)
O
O
I
I
O
I
I
I
I
O
O
NC pins should left open for additional functions in the future
PECL
Vcc-2V
(AC GND)
PECL
Analog
Analog
+5V
+5V
(SDT8028-T_-Q_)
-3/9-
+0.5
-0.5
Specification : TS-S96D048F
July, 2001
5. Absolute Maximum Ratings
Parameter
Storage Case Temperature
Operating Case Temperature
Supply Voltage
Input Voltage
Lead Soldering (Temperature)
(Time)
Symbol
Ts
T
C
Vcc-Vee
Vi
min.
-40
0
0.0
Vee
Max
85
70
6.0
Vcc
260
10
Unit
°C
°C
V
V
°C
sec.
Note
1
1
2
3
4
Note 1. No condensation allowed. 2. Vcc>Vee, Vcc=+5.0V for Vee=GND or Vcc=GND for Vee=-5.0V
3. Data, Clock, Disable and Selector 4. Measured on lead pins 2mm (0.079in.) off the package bottom
Warning
Use the product with the rated voltage described in the specification. If the voltage exceeds the maximum rating, overheating or fire
may occur.
Caution
Do not store the product in the area where temperature exceeds the maximum rating, where there is too much moisture or damp-
ness, where there is acid gas or corrosive gas, or other extreme conditions. Otherwise, failure, overheating or fire may occur.
6. Electrical Interface
( Unless otherwise specified, Vcc-Vee = 4.75 to 5.25 V @2488.32Mbps, PRBS2^23-1, 50% duty
and all operating temperature shall apply.)
Parameter
Supply Voltage
Supply Current
Input Impedance ( Data and Clock)
Input Voltage
High
(Data and Clock, for ECL or PECL interface)
Low
Differential Input Voltage Swing for AC coupled interface
Input Signal Rise Time (20% - 80%)
Input Signal Fall Time (20% - 80%)
Setup Time (for clocked mode)
Hold Time (for clocked mode)
Disable Input Voltage
Disable
Enable
Selector Input Voltage
Clocked
Non Clocked
LD Bias Alarm Output Voltage
Normal
Abnormal
LD Bias Monitor Voltage (between pin 22 and pin 21)
Rear Facet PD monitor Voltage (between pin 3 and pin 4)
Symbol
Vcc-Vee
Id
Rin
V
IH
V
IL
Vin
Tr
Tf
Tset
Thold
Vdisbl
Venbl
Vslct
Vnclct
Valml
Valmh
Vbm
Vrfm
Min.
4.75
Typ.
5.00
150
50
Vcc-0.90
Vcc-1.70
0.80
100
100
Max.
5.25
200
Vcc-0.70
Vcc-1.60
1.20
120
120
Unit
V
mA
Ω
V
V
Vp-p
ps
ps
ps
ps
V
V
V
V
V
V
V
V
Note
1
2
Vcc-1.00
Vcc-1.90
0.45
130
75
Vee+2.00
Vee
Vee
Vcc-1.5
Vee
Vcc-1.00
0.01
0.01
0.10
0.10
Vcc
Vee+0.8
Vee+1.5
Vcc
Vee+0.5
Vcc
0.50
0.25
3
3
4
5
6
7, 9
8, 9
1. Termination current is not included. 2. Measured between each signal input and VTTD or VTTC. Refer to Figure 3.
3. Refer to Figure 4. 4. Default (Open) normal operation. 5. Default (Open) clocked mode. 6. Alarm will be launched when LD bias
current exceeds 70mA typ. 7. LD bias current can be monitored by measuring the voltage difference between BM(+) Pin 22 and BM(-) Pin
21. Please refer to Figure 5. 8. Rear Facet PD current can be monitored by measuring the voltage difference between RFM(+) Pin 3 and
RFM(-) Pin 4. Please refer to Figure 5.
TD
R in
VTTD
R in
TDb
TDb
TCLK
R in
VTTC
R in
TCLK b
V re f = V c c - 1 .4 V t y p .
10k
Ω
10k
Ω
V re f
TCLK b
T set
T h o ld
T = 400 psec
TCLK
10k
Ω
10k
Ω
V re f
TD
9. High input impedance ( > 1MΩ) device is required to measure this voltage.
Figure 3. Data and Clock Input Interface
(SDT8028-T_-Q_)
Figure 4. Input Data and Clock Timing
-4/9-
Specification : TS-S96D048F
July, 2001
V cc
LD
M o n ito r
P IN -P D
P in 2 2
B M (+ )
3k
Ω
10
Ω
P in 2 1
B M (-)
3k
Ω
2 0 0
Ω
P in 3
R FM (+ )
P in 4
3k
Ω
B ia s
C irc uit
3k
Ω
APC
C irc uit
R FM (-)
Figure 5. BM and RFM Interface
7. Optical Interface
( Unless otherwise specified, Vcc-Vee = 4.75 to 5.25 V @2488.32Mbps, PRBS2^23-1, 50% duty
and all operating temperature shall apply. )
Parameter
Optical Output Power
Optical Output Power (disable)
Extinction Ratio
Center Wavelength
Spectral Width (RMS)
Output Eye Diagram
Symbol
Min.
Typ.
Max.
Unit
Po
-10.0
-3.0
dBm
Podis
-45.0
dBm
Er
8.2
dB
1266
1360
nm
λ
c
∆λ
4.0
nm
Compliant with Bellcore G-253 CORE and ITU G957
Note
1
Note1. Refer to Figure 6 for the eye diagram mask
1 .2 5
1 .0 0
0 .2 0
UI
L o gic " 1 "
N ormalized Am plitude
0 .7 5
0 .2 5
0
-0 . 2 5
L o gic " 0 "
0
T im e (U I )
1 .0
Figure 6. Eye Diagram Mask for Optical Output
Warning
Do not look at the laser beam projection area (e.g. end of optical connector) with naked eyes or through optical equipment while
the power is supplied to this product. Otherwise, your eyes may be injured.
(SDT8028-T_-Q_)
-5/9-
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