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SIHFD123-E3

Description
Si, POWER, FET
CategoryDiscrete semiconductor    The transistor   
File Size2MB,9 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Environmental Compliance
Download Datasheet Parametric Compare View All

SIHFD123-E3 Overview

Si, POWER, FET

SIHFD123-E3 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeDIP
package instructionIN-LINE, R-PDIP-T4
Contacts4
Reach Compliance Codeunknow
ECCN codeEAR99
Other featuresAVALANCHE RATED
Avalanche Energy Efficiency Rating (Eas)100 mJ
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage100 V
Maximum drain current (Abs) (ID)1.3 A
Maximum drain current (ID)1.3 A
Maximum drain-source on-resistance0.27 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDIP-T4
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals4
Operating modeENHANCEMENT MODE
Maximum operating temperature175 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)1.3 W
Maximum pulsed drain current (IDM)10 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
IRFD123, SiHFD123
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
16
4.4
7.7
Single
D
FEATURES
100
0.27
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• For Automatic Insertion
• End Stackable
• 175 °C Operating Temperature
• Fast Switching
• Ease of Paralleling
• Compliant to RoHS Directive 2002/95/EC
Available
RoHS*
COMPLIANT
HVMDIP
DESCRIPTION
G
S
D
G
S
N-Channel MOSFET
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The 4 pin DIP package is a low cost machine-insertable
case style which can be stacked in multiple combinations on
standard 0.1" pin centers. The dual drain serves as a thermal
link to the mounting surface for power dissipation levels up
to 1 W.
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
HVMDIP
IRFD123PbF
SiHFD123-E3
IRFD123
SiHFD123
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
a
Linear Derating Factor
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche
Peak Diode Recovery
Energy
a
T
A
= 25 °C
dV/dt
c
for 10 s
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
V
GS
at 10 V
T
A
= 25 °C
T
A
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
100
± 20
1.3
0.94
10
0.0083
100
1.3
0.13
1.3
5.5
- 55 to + 175
300
d
W/°C
mJ
A
mJ
W
V/ns
°C
A
UNIT
V
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 25 V, starting T
J
= 25 °C, L = 22 mH, R
g
= 25
,
I
AS
= 2.6 A (see fig. 12).
c. I
SD
9.2 A, dI/dt
110 A/μs, V
DD
V
DS
, T
J
175 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 90161
S10-2466-Rev. C, 25-Oct-10
www.vishay.com
1

SIHFD123-E3 Related Products

SIHFD123-E3 SIHFD123
Description Si, POWER, FET Si, POWER, FET
Parts packaging code DIP DIP
package instruction IN-LINE, R-PDIP-T4 IN-LINE, R-PDIP-T4
Contacts 4 4
Reach Compliance Code unknow unknow
ECCN code EAR99 EAR99
Other features AVALANCHE RATED AVALANCHE RATED
Avalanche Energy Efficiency Rating (Eas) 100 mJ 100 mJ
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 100 V 100 V
Maximum drain current (Abs) (ID) 1.3 A 1.3 A
Maximum drain current (ID) 1.3 A 1.3 A
Maximum drain-source on-resistance 0.27 Ω 0.27 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-30 code R-PDIP-T4 R-PDIP-T4
JESD-609 code e3 e0
Number of components 1 1
Number of terminals 4 4
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 175 °C 175 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE
Polarity/channel type N-CHANNEL N-CHANNEL
Maximum power dissipation(Abs) 1.3 W 1.3 W
Maximum pulsed drain current (IDM) 10 A 10 A
Certification status Not Qualified Not Qualified
surface mount NO NO
Terminal surface Matte Tin (Sn) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE THROUGH-HOLE
Terminal location DUAL DUAL
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
Base Number Matches 1 1
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