STM32F405OG datasheet, PDF - EEWORLD Datasheet

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STM32F405OG: DescriptionARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS; File Size5MB，185 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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STM32F405OG Overview

ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS

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STM32F405xx

STM32F407xx

ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB

OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

Datasheet

production data

FBGA

•

LQFP64 (10 × 10 mm)

LQFP100 (14 × 14 mm)

LQFP144 (20 × 20 mm)

LQFP176 (24 × 24 mm)

WLCSP90

UFBGA176

(10 × 10 mm)

•

Features

•

Core: ARM 32-bit Cortex™-M4 CPU with FPU,

Adaptive real-time accelerator (ART

Accelerator™) allowing 0-wait state execution

from Flash memory, frequency up to 168 MHz,

memory protection unit, 210 DMIPS/

1.25 DMIPS/MHz (Dhrystone 2.1), and DSP

instructions

•

Memories

– Up to 1 Mbyte of Flash memory

– Up to 192+4 Kbytes of SRAM including 64-

Kbyte of CCM (core coupled memory) data

RAM

– Flexible static memory controller

supporting Compact Flash, SRAM,

PSRAM, NOR and NAND memories

•

LCD parallel interface, 8080/6800 modes

•

Clock, reset and supply management

– 1.8 V to 3.6 V application supply and I/Os

– POR, PDR, PVD and BOR

– 4-to-26 MHz crystal oscillator

– Internal 16 MHz factory-trimmed RC (1%

accuracy)

– 32 kHz oscillator for RTC with calibration

– Internal 32 kHz RC with calibration

•

Low power

– Sleep, Stop and Standby modes

– V

BAT

supply for RTC, 20×32 bit backup

registers + optional 4 KB backup SRAM

•

3×12-bit, 2.4 MSPS A/D converters: up to 24

channels and 7.2 MSPS in triple interleaved

mode

•

2×12-bit D/A converters

•

General-purpose DMA: 16-stream DMA

controller with FIFOs and burst support

•

Up to 17 timers: up to twelve 16-bit and two 32-

bit timers up to 168 MHz, each with up to 4

•

IC/OC/PWM or pulse counter and quadrature

(incremental) encoder input

Debug mode

– Serial wire debug (SWD) & JTAG

interfaces

– Cortex-M4 Embedded Trace Macrocell™

Up to 140 I/O ports with interrupt capability

– Up to 136 fast I/Os up to 84 MHz

– Up to 138 5 V-tolerant I/Os

Up to 15 communication interfaces

– Up to 3 × I

C interfaces (SMBus/PMBus)

– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO

7816 interface, LIN, IrDA, modem control)

– Up to 3 SPIs (42 Mbits/s), 2 with muxed

full-duplex I

S to achieve audio class

accuracy via internal audio PLL or external

clock

– 2 × CAN interfaces (2.0B Active)

– SDIO interface

Advanced connectivity

– USB 2.0 full-speed device/host/OTG

controller with on-chip PHY

– USB 2.0 high-speed/full-speed

device/host/OTG controller with dedicated

DMA, on-chip full-speed PHY and ULPI

– 10/100 Ethernet MAC with dedicated DMA:

supports IEEE 1588v2 hardware, MII/RMII

8- to 14-bit parallel camera interface up to

54 Mbytes/s

True random number generator

CRC calculation unit

96-bit unique ID

RTC: subsecond accuracy, hardware calendar

Table 1. Device summary

Reference

Part number

STM32F405RG, STM32F405VG, STM32F405ZG,

STM32F405OG, STM32F405OE

STM32F407VG, STM32F407IG, STM32F407ZG,

STM32F407VE, STM32F407ZE, STM32F407IE

STM32F405xx

STM32F407xx

June 2013

This is information on a product in full production.

DocID022152 Rev 4

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www.st.com

Contents

STM32F405xx, STM32F407xx

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.1

2.2

Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

2.2.6

2.2.7

2.2.8

2.2.9

2.2.10

2.2.11

2.2.12

2.2.13

2.2.14

2.2.15

2.2.16

2.2.17

2.2.18

2.2.19

2.2.20

2.2.21

2.2.22

2.2.23

2.2.24

2.2.25

2.2.26

2.2.27

2.2.28

2.2.29

ARM

Cortex™-M4F core with embedded Flash and SRAM . . . . . . . . 19

Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . 19

Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 20

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . 22

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 22

External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 22

Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 28

Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . 28

Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

BAT

operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Universal synchronous/asynchronous receiver transmitters (USART) . 33

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Inter-integrated sound (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . 35

Ethernet MAC interface with dedicated DMA and IEEE 1588 support . 35

Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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2.2.30

2.2.31

2.2.32

2.2.33

2.2.34

2.2.35

2.2.36

2.2.37

2.2.38

2.2.39

Contents

Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . 36

Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . 36

Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . 37

Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 38

Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

5.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

5.1.7

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

5.2

5.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

5.3.6

5.3.7

5.3.8

5.3.9

5.3.10

5.3.11

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

VCAP_1/VCAP_2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Operating conditions at power-up / power-down (regulator ON) . . . . . . 80

Operating conditions at power-up / power-down (regulator OFF) . . . . . 80

Embedded reset and power control block characteristics . . . . . . . . . . . 80

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

PLL spread spectrum clock generation (SSCG) characteristics . . . . . 102

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Contents

5.3.12

5.3.13

5.3.14

5.3.15

5.3.16

5.3.17

5.3.18

5.3.19

5.3.20

5.3.21

5.3.22

5.3.23

5.3.24

5.3.25

5.3.26

5.3.27

5.3.28

STM32F405xx, STM32F407xx

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 108

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

BAT

monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 155

SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 156

RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

6.1

6.2

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170

Appendix A Application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171

A.1

A.2

A.3

USB OTG full speed (FS) interface solutions . . . . . . . . . . . . . . . . . . . . . 171

USB OTG high speed (HS) interface solutions . . . . . . . . . . . . . . . . . . . . 173

Ethernet interface solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176

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List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Table 44.

Table 45.

Table 46.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

STM32F405xx and STM32F407xx: features and peripheral counts. . . . . . . . . . . . . . . . . . 13

Regulator ON/OFF and internal reset ON/OFF availability. . . . . . . . . . . . . . . . . . . . . . . . . 28

Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

STM32F40x pin and ball definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

FSMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Alternate function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

STM32F40x register boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Limitations depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . 79

VCAP_1/VCAP_2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . . 80

Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . . 80

Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 81

Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (ART accelerator enabled) or RAM . . . . . . . . . . . . . . . . . . . 83

Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (ART accelerator disabled) . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Typical and maximum current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . 87

Typical and maximum current consumptions in Stop mode . . . . . . . . . . . . . . . . . . . . . . . . 88

Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . . 88

Typical and maximum current consumptions in V

BAT

mode. . . . . . . . . . . . . . . . . . . . . . . . 89

Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

HSE 4-26 MHz oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

LSE oscillator characteristics (f

LSE

= 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Main PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

PLLI2S (audio PLL) characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

SSCG parameters constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Flash memory programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Flash memory programming with V

PP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

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STM32F405OG Related Products

	STM32F405OG	STM32F405OE	STM32F405xx	STM32F407xx	STM32F407ZG	STM32F405VG	STM32F405XX_13	STM32F407VG	STM32F407ZE
Description	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera	ARM Cortex-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

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