= 384/256fs, and 16-bit data, unless otherwise noted.
PCM1710U
PARAMETER
RESOLUTION
DIGITAL INPUT
Logic Family
Input Logic Level (except XTI)
V
IH
V
IL
Input Logic Current (except XTI)
Input Logic Level (XTI)
V
IH
V
IL
Input Logic Current (XTI)
Output Logic Level (CLKO):
V
OH
V
OL
Output Logic Current (CLKO)
Data Format
Sampling Frequency
System Clock Frequency
System Clock Frequency
DC ACCURACY
Gain Error
Gain Mis-Match Channel-To-Channel
Bipolar Zero Error
Gain Drift
Bipolar Gain Drift
DYNAMIC PERFORMANCE
(1)
THD+N at F/S (0dB)
(2)
THD+N at –60fdB
(2)
Dynamic Range
S/N Ratio
Channel Separation
DIGITAL FILTER PERFORMANCE
Pass Band Ripple
Pass Band Ripple
Stop Band Attenuation
Stop Band Attenuation
Pass Band
Pass Band
Stop Band
Stop Band
De-emphasis Error
ANALOG OUTPUT
Voltage Range
Load Impedance
Center Voltage
POWER SUPPLY REQUIREMENTS
Voltage Range: +V
CC
+V
DD
Supply Current (+I
CC
) + (+I
DD
)
TEMPERATURE RANGE
Operation
Storage
CONDITIONS
MIN
16
TYP
MAX
20
UNITS
Bits
2.0
0.8
–200
3.2
1.4
±50
4.5
0.5
±10
Normal (16/20-bit)/IIS (16-bit) selectable
384f
S
256f
S
32
12.288
8.192
44.1
16.934
11.2894
±1.0
±1.0
±20.0
±50
±20
–92
–36
98
110
94
48
18.432
12.288
±5.0
±5.0
VDC
VDC
µA
VDC
VDC
µA
VDC
VDC
mA
kHz
MHz
MHz
% of FSR
% of FSR
mV
ppm of FSR/°C
ppm of FSR/°C
dB
dB
dB
dB
dB
dB
dB
dB
dB
fs
fs
fs
fs
dB
Vp-p
kΩ
V
V
O
= 1/2V
CC
at Bipolar Zero
f
IN
= 991kHz
f
IN
= 991kHz
EIAJ A-weighted
EIAJ A-weighted
–88
–32
104
90
Normal Mode
Double Speed Mode
Normal Mode
Double Speed Mode
Normal Mode
Double Speed Mode
Normal Mode
Double Speed Mode
(f
S
32kHz ~ 48kHz)
±0.008
±0.018
–62
–58
0.4535
0.4535
0.5465
0.5465
+0.03
3.2
5
+1/2V
CC
+4.5
+4.5
+5.0
+5.0
45
+5.5
+5.5
70
+85
+100
–0.05
VDC
VDC
mA
°C
°C
–25
–55
NOTE: (1) Dynamic performance specs are tested with external 20kHz low pass filter. (2) 30kHz LPF, 400Hz HPF, Average Mode. Shibusoku #725 THD Meter.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
PCM1710U
2
PIN ASSIGNMENTS
PIN NAME
NUMBER
FUNCTION
Input Interface Pins
LRCIN
DIN
BCKIN
1
2
3
Sample Rate Clock Input. Controls the update rate (fs).
Serial Data Input. MSB first, right justified format contains a frame of 16-bit or 20-bit data.
Bit Clock Input. Clocks in the data present on DIN input.
Mode Controls and Clock Signals
CLKO
XTI
XTO
CKSL
MODE
MUTE
MD/DM1
MC/DM2
ML/DSD
4
5
6
23
24
25
26
27
28
Buffered Output of Oscillator. Equivalent to fs.
Oscillator Input (External Clock Input). For an internal clock, tie XTI to one side of the crystal oscillator. For an external clock,
tie XTI to the output of the chosen external clock.
Oscillator Output. When using the internal clock, tie to the opposite side (from pin 5) of the crystal oscillator. When using an
external clock, leave XTO open.
System Clock Select. For 384fs, tie CKSL “High”. For 256fs, tie CKSL “Low”.
Operation Mode Select. For serial mode, tie MODE “High”. For parallel mode, tie MODE “Low”.
Mute Control. To disable soft mute, tie MUTE “High”. To enable soft mute, tie MUTE “Low”.
Mode Control for Data/De-emphasis. See “Mode Control Functions” on page 11.
Mode Control for BCKIN/De-emphasis. See “Mode Control Functions” on page 11.
Mode Control for WDCK/Double speed dubbing. See “Mode Control Functions” on page 11.
Analog Functions
V
OUT
R
V
OUT
L
13
16
Right Channel Analog Output.
Left Channel Analog Output.
Power Supply Connections
DGND
V
DD
V
CC
2R
AGND2R
EXT1R
EXT2R
AGND
V
CC
EXT2L
EXT1L
AGND2L
V
CC
2L
7, 22
8, 21
9
10
11
12
14
15
17
18
19
20
Digital Ground.
Digital Power Supply (+5V).
Analog Power Supply (+5V), Right Channel DAC.
Analog Ground (DAC), Right Channel.
Output Amplifier Common, Right Channel. Bypass to ground with a 10µF capacitor.
Output Amplifier Bias, Right Channel. Connect to EXT1R.
Analog Ground.
Analog Power Supply (+5V).
Output Amplifier Bias, Left Channel. Connect to EXT1L.
Output Amplifier Common, Left Channel. Bypass to ground with a 10µF capacitor.
Analog Ground (DAC), Left Channel.
Analog Power Supply (+5V), Left Channel DAC.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltages ................................................................
±6.5VDC
+V
CC
to V
DD
Voltage ..........................................................................
±0.1V
Input Logic Voltage ..................................................... –0.3V to V
DD
+0.3V
Power Dissipation .......................................................................... 400mW
Operating Temperature Range ......................................... –25°C to +85°C
Storage Temperature Range .......................................... –55°C to +125°C
Lead Temperature (soldering, 5s) ................................................. +260°C
PACKAGE INFORMATION
MODEL
PCM1710U
PACKAGE
28-Pin SOIC
PACKAGE DRAWING
NUMBER
(1)
217
NOTE: (1) For detailed drawing and dimension table, please see end of data
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