UNISONIC TECHNOLOGIES CO., LTD
3N80
Preliminary
Power MOSFET
2.5 Amps, 800 Volts
N-CHANNEL POWER MOSFET
DESCRIPTION
The UTC
3N80
uses advanced trench technology to provide
excellent R
DS(ON)
, low gate charge and operation with low gate
voltages. This device is suitable for use as a load switch or in PWM
applications.
FEATURES
* R
DS(ON)
=3.8Ω @V
GS
=10 V
* Ultra low gate charge ( typical 19 nC )
* Low reverse transfer capacitance ( C
RSS
= typical 11 pF )
* Fast switching capability
* Avalanche energy specified
* Improved dv/dt capability, high ruggedness
Lead-free:
3N80L
Halogen-free: 3N80G
SYMBOL
2.Drain
3.Gate
1.Source
ORDERING INFORMATION
Normal
3N80-TA3-T
3N80-TF3-T
Ordering Number
Lead Free
3N80L-TA3-T
3N80L-TF3-T
Halogen Free
3N80G-TA3-T
3N80G-TF3-T
Package
TO-220
TO-220F
Pin Assignment
1
2
3
G
D
S
G
D
S
Packing
Tube
Tube
www.unisonic.com.tw
Copyright © 2008 Unisonic Technologies Co., Ltd
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QW-R502-283,a
3N80
Preliminary
SYMBOL
V
DSS
V
DGR
V
GSS
BV
GSO
V
ESD(G-S)
V
ISO
I
AR
I
D
I
DM
E
AS
dv/dt
Power MOSFET
ABSOLUTE MAXIMUM RATINGS
(T
C
=25℃, unless otherwise specified)
RATINGS
UNIT
800
V
800
V
±30
V
30(MIN)
V
2
V
TO-220F
2500
V
2.5
A
2.5
A
10
A
170
mJ
4.5
V/ns
TO-220
70
Power Dissipation
P
D
W
TO-220F
25
Junction Temperature
T
J
+150
℃
Storage Temperature
T
STG
-55 ~ +150
℃
Note: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Pulse width limited by T
J(MAX)
3. starting T
J
=25 °C, I
D
=I
AR
, V
DD
=50V
4. I
SD
≦2.5A,
di/dt≦200A/μs, V
DD
≦BV
DSS
, T
J
≦T
J(MAX)
.
PARAMETER
Drain-Source Voltage (V
GS
=0V)
Drain-Gate Voltage (R
G
=20kΩ)
Gate-Source Voltage
Gate-Source Breakdown Voltage (I
GS
=±1mA)
Gate Source ESD(HBM-C=100pF, R=1.5KΩ)
Insulation Withstand Voltage (DC)
Avalanche Current (Note 2)
Continuous Drain Current
Pulsed Drain Current
Single Pulse Avalanche Energy (Note 3)
Peak Diode Recovery dv/dt (Note 4)
THERMAL DATA
PARAMETER
Junction-to-Ambient
Junction-to-Case
TO-220
TO-220F
TO-220
TO-220F
SYMBOL
θ
JA
θ
JC
RATING
62.5
62.5
1.78
5
UNIT
°C/W
°C/W
ELECTRICAL CHARACTERISTICS
(T
C
=25℃, unless otherwise specified)
PARAMETER
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
Drain-Source Leakage Current
Gate-Source Leakage Current
ON CHARACTERISTICS
Gate Threshold Voltage
Static Drain-Source On-State Resistance
Forward Transconductance (Note 1)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Equivalent Output Capacitance (Note 2)
SWITCHING CHARACTERISTICS
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
SYMBOL
BV
DSS
I
DSS
I
GSS
V
GS(TH)
R
DS(ON)
g
FS
C
ISS
C
OSS
C
RSS
C
OSS(EQ)
t
D(ON)
t
R
t
D(OFF)
t
F
Q
G
Q
GS
Q
DD
TEST CONDITIONS
V
GS
=0V, I
D
=1mA
V
DS
=800V, V
GS
=0 V
V
GS
=±30V, V
DS
=0 V
V
DS
=V
GS
, I
D
=50μA
V
GS
=10V, I
D
=1.25A
V
DS
=15V, I
D
=1.25A
MIN TYP MAX UNIT
800
1
±10
3
3.75
3.8
2.1
485
57
11
22
17
27
36
40
19
3.2
10.8
4.5
4.5
V
μA
μA
V
Ω
S
pF
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
2 of 6
QW-R502-283.a
V
DS
=25V, V
GS
=0V, f=1MHz
V
GS
=0V, V
DS
=0V~640V
V
DD
=400V, I
D
=1.25 A, R
G
=4.7Ω
V
GS
=10 V
V
DD
=640V, I
D
=2.5A, V
GS
=10V
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
3N80
Preliminary
Power MOSFET
ELECTRICAL CHARACTERISTICS(Cont.)
SOURCE- DRAIN DIODE RATINGS AND CHARACTERISTICS
Diode Forward Voltage(Note 1)
V
SD
I
SD
=2.5A ,V
GS
=0V
1.6
V
Source-Drain Current
I
SD
2.5
A
Source-Drain Current (Pulsed)
I
SDM
10
A
Reverse Recovery Current
I
RRM
8.4
A
I
SD
=2.5A, di/dt=100A/μs,
Body Diode Reverse Recovery Time
t
RR
384
ns
V
DD
=50V, T
J
=25°C
1600
nC
Body Diode Reverse Recovery Charge
Q
RR
Note: 1.Pulse width=300μs, Duty cycle≦1.5%
Note:
2.C
OSS(EQ)
is defined asa constant equivalent capacitance giving the same charging time as C
OSS
when V
DS
increases from 0to 80% V
DSS
.
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3 of 6
QW-R502-283.a
3N80
Preliminary
Power MOSFET
TEST CIRCUITS AND WAVEFORMS
D.U.T.
+
V
DS
-
+
-
L
R
G
Driver
V
GS
Same Type
as D.U.T.
* dv/dt controlled by R
G
* I
SD
controlled by pulse period
* D.U.T.-Device Under Test
V
DD
Fig. 1A Peak Diode Recovery dv/dt Test Circuit
V
GS
(Driver)
Period
P.W.
D=
P. W.
Period
V
GS
= 10V
I
FM
, Body Diode Forward Current
I
SD
(D.U.T.)
I
RM
Body Diode Reverse Current
di/dt
Body Diode Recovery dv/dt
V
DS
(D.U.T.)
V
DD
Body Diode
Forward Voltage Drop
Fig. 1B Peak Diode Recovery dv/dt Waveforms
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
4 of 6
QW-R502-283.a
3N80
Preliminary
Power MOSFET
TEST CIRCUITS AND WAVEFORMS (Cont.)
Fig. 2A Switching Test Circuit
Fig. 2B Switching Waveforms
Fig. 3A Gate Charge Test Circuit
Fig. 3B Gate Charge Waveform
L
V
DS
BV
DSS
I
AS
R
D
V
DD
D.U.T.
t
p
t
p
Time
V
DD
I
D(t)
V
DS(t)
10V
Fig. 4A Unclamped Inductive Switching Test Circuit
Fig. 4B Unclamped Inductive Switching Waveforms
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www.unisonic.com.tw
5 of 6
QW-R502-283.a
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