Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output
DAC with Dynamic Power Control and HART Connectivity
Data Sheet
FEATURES
12-bit resolution and monotonicity
Dynamic power control for thermal management
or external PMOS mode
Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA,
and 0 mA to 24 mA
±0.1% total unadjusted error (TUE) maximum
User-programmable offset and gain
On-chip diagnostics
On-chip reference: ±10 ppm/°C maximum
−40°C to +105°C temperature range
AD5737
Each channel has a corresponding CHART pin so that HART
signals can be coupled onto the current output of the
AD5737.
The
AD5737
uses a versatile 3-wire serial interface that operates
at clock rates of up to 30 MHz and is compatible with standard
SPI, QSPI™, MICROWIRE®, DSP, and microcontroller interface
standards. The serial interface also features optional CRC-8 packet
error checking, as well as a watchdog timer that monitors activity
on the interface.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Dynamic power control for thermal management.
12-bit performance.
Quad channel.
HART compliant.
APPLICATIONS
Process control
Actuator control
PLCs
HART network connectivity
COMPANION PRODUCTS
Product Family:
AD5755, AD5755-1, AD5757, AD5735
HART Modem:
AD5700, AD5700-1
External References:
ADR445, ADR02
Digital Isolators:
ADuM1410, ADuM1411
Power:
ADP2302, ADP2303
Additional companion products on the
AD5737 product page
GENERAL DESCRIPTION
The
AD5737
is a quad-channel current output DAC that
operates with a power supply range from 10.8 V to 33 V.
On-chip dynamic power control minimizes package power
dissipation by regulating the voltage on the output driver from
7.4 V to 29.5 V using a dc-to-dc boost converter optimized for
minimum on-chip power dissipation.
FUNCTIONAL BLOCK DIAGRAM
AV
CC
5.0V
AGND
AV
DD
+15V
SW
x
V
BOOST_x
DV
DD
DGND
LDAC
SCLK
SDIN
SYNC
SDO
CLEAR
FAULT
ALERT
AD1
AD0
DAC CHANNEL A
REFOUT
REFERENCE
REFIN
DAC CHANNEL B
DAC CHANNEL C
GAIN REG A
OFFSET REG A
DIGITAL
INTERFACE
+
DAC A
DC-TO-DC
CONVERTER
7.4V TO 29.5V
I
OUT_x
R
SET_x
CURRENT
OUTPUT RANGE
SCALING
CHARTx
AD5737
NOTES
1. x = A, B, C, OR D.
DAC CHANNEL D
10067-101
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved.
AD5737
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Companion Products ....................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Detailed Functional Block Diagram .............................................. 3
Specifications..................................................................................... 4
AC Performance Characteristics ................................................ 6
Timing Characteristics ................................................................ 6
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 13
Current Outputs ......................................................................... 13
DC-to-DC Converter ................................................................. 17
Reference ..................................................................................... 18
General ......................................................................................... 19
Terminology .................................................................................... 20
Theory of Operation ...................................................................... 21
DAC Architecture ....................................................................... 21
Power-On State of the AD5737 ................................................ 21
Serial Interface ............................................................................ 21
Transfer Function ....................................................................... 22
Registers ........................................................................................... 23
Enabling the Output ................................................................... 24
Reprogramming the Output Range ......................................... 24
Data Registers ............................................................................. 25
Control Registers ........................................................................ 27
Data Sheet
Readback Operation .................................................................. 30
Device Features ............................................................................... 32
Fault Output ................................................................................ 32
Digital Offset and Gain Control ............................................... 32
Status Readback During a Write .............................................. 32
Asynchronous Clear................................................................... 32
Packet Error Checking ............................................................... 33
Watchdog Timer ......................................................................... 33
Alert Output ................................................................................ 33
Internal Reference ...................................................................... 33
External Current Setting Resistor ............................................ 33
HART Connectivity ................................................................... 34
Digital Slew Rate Control .......................................................... 34
Dynamic Power Control............................................................ 35
DC-to-DC Converters ............................................................... 35
AI
CC
Supply Requirements—Static .......................................... 36
AI
CC
Supply Requirements—Slewing ...................................... 37
External PMOS Mode ................................................................ 38
Applications Information .............................................................. 39
Current Output Mode with Internal R
SET
................................ 39
Precision Voltage Reference Selection ..................................... 39
Driving Inductive Loads............................................................ 39
Transient Voltage Protection .................................................... 40
Microprocessor Interfacing ....................................................... 40
Layout Guidelines....................................................................... 40
Galvanically Isolated Interface ................................................. 41
Industrial HART Capable Analog Output Application ........ 42
Outline Dimensions ....................................................................... 43
Ordering Guide .......................................................................... 43
REVISION HISTORY
5/12—Rev. A to Rev. B
Changes to Companion Products Section .................................... 1
Change to Table
6
........................................................................... 12
Added Industrial HART Capable Analog Output Application
Section and Figure 65, Renumbered Sequentially ..................... 42
Updated Outline Dimensions ....................................................... 43
11/11—Rev. 0 to Rev. A
Change to Accuracy, External R
SET
Parameter in Table 1 ............ 4
Changes to Power-On State of the AD5737 Section .................. 21
Rev. B | Page 2 of 44
Changes to Readback Operation Section and Readback
Example Section ............................................................................. 30
7/11—Revision 0: Initial Version
Data Sheet
DETAILED FUNCTIONAL BLOCK DIAGRAM
AV
CC
5.0V
AGND
AV
DD
+15V
SW
A
V
BOOST_A
AD5737
DV
DD
DGND
LDAC
CLEAR
SCLK
SDIN
SYNC
SDO
FAULT
POWER-ON
RESET
DYNAMIC
POWER
CONTROL
INPUT
SHIFT
REGISTER
AND
CONTROL
DAC
DATA
REG A
GAIN REG A
OFFSET REG A
R1
DAC
INPUT
REG A
DC-TO-DC
CONVERTER
7.4V TO 29.5V V
SEN1
V
SEN2
12
+
12
R2
DAC A
R3
I
OUT_A
STATUS
REGISTER
ALERT
WATCHDOG
TIMER
(SPI ACTIVITY)
V
REF
R
SET_A
CHARTA
REFOUT
REFIN
DAC CHANNEL A
REFERENCE
BUFFERS
DAC CHANNEL B
DAC CHANNEL C
DAC CHANNEL D
V
BOOST_B
, V
BOOST_C
, V
BOOST_D
10067-001
I
OUT_B
, I
OUT_C
, I
OUT_D
R
SET_B
, R
SET_C
, R
SET_D
CHARTB, CHARTC, CHARTD
AD1
AD0
AD5737
SW
B
, SW
C
, SW
D
Figure 2.
Rev. B | Page 3 of 44
AD5737
SPECIFICATIONS
Data Sheet
AV
DD
= V
BOOST_x
= 15 V; DV
DD
= 2.7 V to 5.5 V; AV
CC
= 4.5 V to 5.5 V; dc-to-dc converter disabled; AGND = DGND = GNDSW
x
= 0 V;
REFIN = 5 V; R
L
= 300 Ω; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter
1
CURRENT OUTPUT
Output Current Ranges
Min
0
0
4
12
Typ
Max
24
20
20
Unit
mA
mA
mA
Bits
Assumes ideal resistor (see the External Current
Setting Resistor section for more information)
−0.1
−0.032
−1
−0.1
−0.1
−0.1
±0.019
100
±0.006
±0.012
±4
±0.004
±3
±0.014
±5
0.0005
±0.022
180
±0.006
±0.017
±6
±0.004
±9
±0.02
±14
−0.011
V
BOOST_x
−
2.4
90
140
Resistive Load
1000
+0.1
+0.032
+1
+0.1
+0.1
+0.1
% FSR
ppm FSR
% FSR
LSB
% FSR
ppm FSR/°C
% FSR
ppm FSR/°C
% FSR
ppm FSR/°C
% FSR
% FSR
ppm FSR
% FSR
LSB
% FSR
ppm FSR/°C
% FSR
ppm FSR/°C
% FSR
ppm FSR/°C
% FSR
V
Drift after 1000 hours, ¾ scale output, T
J
= 150°C
External R
SET
Internal R
SET
The dc-to-dc converter has been characterized
with a maximum load of 1 kΩ, chosen such that
compliance is not exceeded; see Figure 30 and
the DC-DC MaxV bits in Table 27
Drift after 1000 hours, T
J
= 150°C
Guaranteed monotonic
Test Conditions/Comments
Resolution
ACCURACY, EXTERNAL R
SET
Total Unadjusted Error (TUE)
TUE Long-Term Stability
Relative Accuracy (INL)
Differential Nonlinearity (DNL)
Offset Error
Offset Error Drift
2
Gain Error
Gain TC
2
Full-Scale Error
Full-Scale TC
2
DC Crosstalk
ACCURACY, INTERNAL R
SET
Total Unadjusted Error (TUE)
3, 4
TUE Long-Term Stability
Relative Accuracy (INL)
Differential Nonlinearity (DNL)
Offset Error
3, 4
Offset Error Drift
2
Gain Error
Gain TC
2
Full-Scale Error
3, 4
Full-Scale TC
2
DC Crosstalk
4
OUTPUT CHARACTERISTICS
2
Current Loop Compliance Voltage
Output Current Drift vs. Time
External R
SET
−0.14
−0.032
−1
−0.1
−0.12
−0.14
+0.14
+0.032
+1
+0.1
+0.12
+0.14
Drift after 1000 hours, T
J
= 150°C
Guaranteed monotonic
Internal R
SET
V
BOOST_x
−
2.7
ppm FSR
ppm FSR
Ω
DC Output Impedance
DC PSRR
REFERENCE INPUT/OUTPUT
Reference Input
2
Reference Input Voltage
DC Input Impedance
Reference Output
Output Voltage
Reference TC
2
100
0.02
1
MΩ
µA/V
4.95
45
4.995
−10
5
150
5
±5
5.05
V
MΩ
V
ppm/°C
For specified performance
5.005
+10
T
A
= 25°C
Rev. B | Page 4 of 44
Data Sheet
Parameter
1
Output Noise (0.1 Hz to 10 Hz)
2
Noise Spectral Density
2
Output Voltage Drift vs. Time
2
Capacitive Load
2
Load Current
Short-Circuit Current
Line Regulation
2
Load Regulation
2
Thermal Hysteresis
2
DC-TO-DC CONVERTER
Switch
Switch On Resistance
Switch Leakage Current
Peak Current Limit
Oscillator
Oscillator Frequency
Maximum Duty Cycle
DIGITAL INPUTS
2
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input Current
Pin Capacitance
DIGITAL OUTPUTS
2
SDO, ALERT Pins
Output Low Voltage, V
OL
Output High Voltage, V
OH
High Impedance Leakage
Current
High Impedance Output
Capacitance
FAULT Pin
Output Low Voltage, V
OL
Output High Voltage, V
OH
POWER REQUIREMENTS
AV
DD
DV
DD
AV
CC
AI
DD
DI
CC
AI
CC
I
BOOST 5
Power Dissipation
1
2
AD5737
Min
Typ
7
100
180
1000
9
10
3
95
160
5
Max
Unit
µV p-p
nV/√Hz
ppm
nF
mA
mA
ppm/V
ppm/mA
ppm
ppm
Test Conditions/Comments
At 10 kHz
Drift after 1000 hours, T
J
= 150°C
See Figure 41
See Figure 42
See Figure 41
First temperature cycle
Second temperature cycle
0.425
10
0.8
11.5
13
89.6
2
−1
2.6
0.8
+1
14.5
Ω
nA
A
MHz
%
V
V
µA
pF
This oscillator is divided down to provide the
dc-to-dc converter switching frequency
At 410 kHz dc-to-dc switching frequency
JEDEC compliant
Per pin
Per pin
0.4
DV
DD
− 0.5
−1
2.5
+1
V
V
µA
pF
Sinking 200 µA
Sourcing 200 µA
0.4
0.6
3.6
9
2.7
4.5
7
9.2
33
5.5
5.5
7.5
11
1
1
155
V
V
V
V
V
V
mA
mA
mA
mA
mW
10 kΩ pull-up resistor to DV
DD
At 2.5 mA
10 kΩ pull-up resistor to DV
DD
V
IH
= DV
DD
, V
IL
= DGND, internal oscillator
running, over supplies
Outputs unloaded, over supplies
Per channel, 0 mA output
AV
DD
= 15 V, DV
DD
= 5 V, dc-to-dc converter
enabled, outputs disabled
Temperature range: −40°C to +105°C; typical at +25°C.
Guaranteed by design and characterization; not production tested.
3
For current outputs with internal R
SET
, the offset, full-scale, and TUE measurements exclude dc crosstalk. The measurements are made with all four channels enabled
and loaded with the same code.
4
See the Current Output Mode with Internal R
SET
section for more information about dc crosstalk.
5
Efficiency plots in Figure 32 through Figure 35 include the I
BOOST
quiescent current.
Rev. B | Page 5 of 44
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