Automotive Product
FEATURES
CMOS 10-bit, 40 MSPS sampling analog-to-digital converter
Power dissipation: 74 mW (3 V supply, 40 MSPS)
17 mW (3 V supply, 5 MSPS)
Operation between 2.7 V and 3.6 V supply
Differential nonlinearity: −0.25 LSB
Power-down (standby) mode: 0.65 mW
ENOB: 9.55 at f
IN
= 20 MHz
Out-of-range indicator
Adjustable on-chip voltage reference
IF undersampling up to f
IN
= 130 MHz
Input range: 1 V to 2 V p-p differential or single-ended
Adjustable power consumption
Internal clamp circuit
Qualified for automotive applications
10-Bit, 40 MSPS, 3 V, 74 mW
Analog-to-Digital Converter
AD9203W
FUNCTIONAL BLOCK DIAGRAM
CLK
CLAMP
CLAMPIN
AINP
AINN
SHA
A/D
REFTF
REFBF
BANDGAP
REFERENCE
+
–
0.5V
AVSS
PWRCON
DFS
DRVSS
CORRECTION LOGIC
D/A
GAIN
A/D
SHA
D/A
GAIN
3-STATE
A/D
AVDD
DRVDD
AD9203W
STBY
OUTPUT BUFFERS
10
OTR
D9 (MSB)
D0 (LSB)
10258-001
VREF
REFSENSE
Figure 1.
APPLICATIONS
Automotive
GENERAL DESCRIPTION
The
AD9203W
is a monolithic low power, single supply, 10-bit,
40 MSPS analog-to-digital converter, with an on-chip voltage
reference. The
AD9203W
uses a multistage differential pipeline
architecture and guarantees no missing codes over the full
operating temperature range. Its input range may be adjusted
between 1 V and 2 V p-p.
The
AD9203W
has an onboard programmable reference. An
external reference can also be chosen to suit the dc accuracy
and temperature drift requirements of an application.
An external resistor can be used to reduce power consumption
when operating at lower sampling rates. This yields power
savings for users who do not require the maximum sample
rate. This feature is especially useful at sample rates far below
40 MSPS. Excellent performance is still achieved at reduced
power. For example, 9.7 ENOB performance may be realized
with only 17 mW of power, using a 5 MHz clock.
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary or
twos complementary output format by using the DFS pin. An
out-of-range signal (OTR) indicates an overflow condition that
can be used with the most significant bit to determine over- or
underrange.
The
AD9203W
can operate with a supply range from 2.7 V to
3.6 V, an attractive option for low power operation in high
speed portable applications.
The
AD9203W
is specified over industrial (−40°C to +85°C)
temperature ranges and is available in a 28-lead TSSOP package.
PRODUCT HIGHLIGHTS
1.
Low Power. The
AD9203W
consumes 74 mW on a 3 V
supply operating at 40 MSPS. In standby mode, power is
reduced to 0.65 mW.
High Performance. Maintains better than 9.55 ENOB at
40 MSPS input signal from dc to Nyquist.
Very Small Package. The
AD9203W
is available in a
28-lead TSSOP.
Programmable Power. The
AD9203W
power can be
further reduced by using an external resistor at lower
sample rates.
Built-In Clamp Function. Allows dc restoration of video
signals.
2.
3.
4.
5.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
AD9203W
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Automotive Product
Thermal Characteristics ...............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Outline Dimensions ..........................................................................7
Ordering Guide .............................................................................7
REVISION HISTORY
10/11—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
Automotive Product
SPECIFICATIONS
AD9203W
AVDD = 3 V, DRVDD = 3 V, F
S
= 40 MSPS, input span from 0.5 V to 2.5 V, internal 1 V reference, PWRCON = AVDD, 50% clock duty
cycle, T
MIN
to T
MAX
unless otherwise noted.
Table 1.
Parameter
RESOLUTION
MAX CONVERSION RATE
PIPELINE DELAY
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
Offset Error
Gain Error
ANALOG INPUT
Input Voltage Range
Input Capacitance
Aperture Delay
Aperture Uncertainty (Jitter)
Input Bandwidth (–3 dB)
Input Referred Noise
INTERNAL REFERENCE
Output Voltage (0.5 V Mode)
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Load Regulation
POWER SUPPLY
Operating Voltage
Analog Supply Current
Digital Supply Current
Power Consumption
Power-Down
Power Supply Rejection Ratio
DYNAMIC PERFORMANCE (AIN = 0.5 dBFS)
Signal-to-Noise and Distortion
1
f = 4.8 MHz
f = 20 MHz
Effective Bits
f = 4.8 MHz
1
f = 20 MHz
Signal-to-Noise Ratio
f = 4.8 MHz
1
f = 20 MHz
Total Harmonic Distortion
f = 4.8MHz
f = 20 MHz
Spurious-Free Dynamic Range
f = 4.8 MHz
1
f = 20 MHz
P
D
PSRR
SINAD
57.2
ENOB
9.2
SNR
57.5
THD
−76.0
−74.0
SFDR
67.8
80
78
dB
dB
−65.0
dB
dB
60.0
59.5
dB
dB
9.6
9.55
Bits
Bits
59.7
59.3
dB
dB
Symbol
F
S
Min
40
5.5
DNL
INL
E
ZS
E
FS
AIN
C
IN
T
AP
T
AJ
BW
1
1.4
2.0
1.2
390
0.3
0.5
1
±5
0.65
2.7
2.7
3.0
3.0
20.1
4.4
9.5
74
88.8
0.65
0.04
±0.25
±0.65
±0.6
±0.7
±0.7
±1.4
±2.8
±4.0
2
Typ
10
Max
Unit
Bits
MSPS
Clock
Cycles
LSB
LSB
% FSR
% FSR
V p-p
pF
ns
ps rms
MHz
mV
V
V
mV
mV
V
V
mA
mA
mA
mW
mW
mW
% FSR
Conditions
Switched, single-ended
REFSENSE = VREF
REFSENSE = GND
1.0 mA load
VREF
VREF
± 30
1.2
3.6
3.6
22.0
6.0
14.0
84.0
108.0
1.2
± 0.25
AVDD
DRVDD
IAVDD
IDRVDD
f
IN
= 4.8 MHz, output bus load = 10 pF
f
IN
= 20 MHz, output bus load = 20 pF
f
IN
= 4.8 MHz, output bus load = 10pF
f
IN
= 20 MHz, output bus load = 20 pF
Rev. 0 | Page 3 of 8
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