EEWORLDEEWORLDEEWORLD

Part Number

Search

3VH18/1JND5(083)

Description
EDGE CONNECTOR,PCB MNT,RECEPT,36 CONTACTS,0.1 PITCH,WRAP POST TERMINAL,HOLE .125-.137
CategoryThe connector    The connector   
File Size535KB,5 Pages
ManufacturerCooper Industries
Download Datasheet Parametric View All

3VH18/1JND5(083) Overview

EDGE CONNECTOR,PCB MNT,RECEPT,36 CONTACTS,0.1 PITCH,WRAP POST TERMINAL,HOLE .125-.137

3VH18/1JND5(083) Parametric

Parameter NameAttribute value
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresTERM L=.49\", INR ROW
Board mount optionsMOUNTING FLANGE
body width0.37 inch
subject depth0.76 inch
body length2.635 inch
Body/casing typeRECEPTACLE
Connector typeCARD EDGE CONNECTOR
Contact to complete cooperationAU ON NI
Contact materialCOPPER ALLOY
contact modeRECTANGULAR
Contact resistance10 mΩ
Contact styleBELLOWED TYPE
Dielectric withstand voltage650VAC V
maximum insertion force2.78 N
Insulation resistance5000000000 Ω
Insulator colorGREEN
insulator materialDIALLYL PHTHALATE
MIL complianceYES
Manufacturer's serial numberJND
Plug contact pitch0.1 inch
Installation option 1HOLE .125-.137
Installation option 2OFFSET
Installation methodRIGHT ANGLE
Installation typeBOARD
Number of connectorsONE
PCB row number2
Number of rows loaded2
Maximum operating temperature125 °C
Minimum operating temperature-65 °C
PCB contact patternRECTANGULAR
PCB contact row spacing3.81 mm
Plating thickness30u inch
Rated current (signal)3 A
GuidelineUL, CSA
reliabilityMIL-C-21097
Terminal length0.14 inch
Terminal pitch2.54 mm
Termination typeWIRE WRAP
Total number of contacts36
Evacuation force-minimum value.278 N
[Perf-V Evaluation] Program Construction and CoreMark Porting on E203 SOC
In the previous post, I used GCC to compile a piece of code to operate the GPIO of the E203 SOC, and then used the openocd debugging tool to write the binary directly into the ITCM memory of the E203,...
cruelfox FPGA/CPLD
Protel DXP 2004 Practical Tutorial CD Version
Protel DXP 2004 Practical Tutorial CD Version...
最好的从该花 PCB Design
How to add TFTP to Ltib? Thank you
I am using the 8315E development board. When using LTIB to compile, I always use the default method without changing the configuration items. After compiling, I download the generated kernel to the de...
jutlmh NXP MCU
OVP Circuit Design in TPS92692-Q1 Buck-Boost Circuit
[i=s]This post was last edited by qwqwqw2088 on 2020-7-31 08:21[/i]Since it can be designed into various topologies such as Boost, Buck-Boost, SEPIC, etc., it has been widely used in automotive LED li...
qwqwqw2088 Analogue and Mixed Signal
Post a summary of the general Makefile
This makefile only needs to modify the compiler and target name, as well as the source file, header file, and .o storage directoryYou can use it directly, and you don’t need to modify the makefile to ...
wuquan-1230 Linux and Android
TI Live: Detailed introduction to "Bidirectional CLLLC Resonant, Dual Active Bridge (DAB) Reference Design"
The CLLLC resonant DAB with bidirectional power flow and soft switching characteristics is an ideal candidate for hybrid electric vehicle/electric vehicle (HEV/EV) onboard charger and energy storage a...
EEWORLD社区 TI Technology Forum

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1980  2549  11  64  28  40  52  1  2  28 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号