CS1615
CS1616
Single Stage Dimmable Offline AC/DC
Controller for LED Lamps
Features
• Best-in-class Dimmer Compatibility
- Leading-edge (TRIAC) Dimmers
- Trailing-edge Dimmers
- Digital Dimmers (Dimmers with an Integrated Power
Supply)
• Flicker-free Dimming
• 0% to 100% Smooth Dimming
• Primary-side Regulation (PSR)
• Active Power Factor Correction (PFC)
- >0.9 Power Factor
• Constant-current Output
- Flyback
- Buck-boost
• Tight LED Current Regulation: Better than ±5%
• Low THD: Less Than 20%
• Up to 90% Efficiency
• Fast Startup
• IEC61000-3-2 Compliant
• Meets NEMA SSL 6 Dimming Standard
- Closely Matches Incandescent S-curve
• Protection Features
- Output Open Circuit
- Output Short Circuit
- External Overtemperature Using NTC
L1
C5
V
rec t
C6
R4
R5
D3
2
IAC
Overview
The CS1615 and CS1616 are high-performance single
stage dimmable offline AC/DC controllers. The CS1615/16
is a cost-effective solution that provides unmatched single-
and multi-lamp dimmer-compatibility performance for
dimmable LED applications. The CS1615 is designed for
120VAC line voltage applications, and the CS1616 is
designed for 230VAC line voltage applications.
Across a broad range of dimmers, the CS1615/16 provides
smooth flicker free dimming, and consistently dims to
nearly zero light output, which closely matches the dimming
performance of incandescent light bulbs. Cirrus Logic’s
patent pending approach to dimmer compatibility provides
full functionality on a wide range of dimmers, including
leading-edge, trailing-edge, and digital dimmers.
Applications
•
•
•
•
Retro-fit LED Lamps
External LED Drivers
LED Luminaries
Commercial Lighting
Ordering Information
See
page 14.
T1
R6
D4
C7
LED+
LED-
R2
BR1
BR1
Q1
D2
5
SOURCE
C1
C2
D1
BR1
BR1
C3
C4
Z1
V
A UX
FBSENSE
R3
D5
Q3
R7
V
AUX
CS1615/16
R1
GD
13
AC
Mains
11
Q2
14
VDD
SGND
CTRL1 CTRL2
FBAUX
16
eOTP
GND
10
R
S
R
S ens e
R8
C8
4
8
9
12
NTC
R
CTRL1
R
CTRL2
Cirrus Logic, Inc.
http://www.cirrus.com
Copyright
Cirrus Logic, Inc. 2013
(All Rights Reserved)
JUN’13
DS961F1
CS1615/16
1. INTRODUCTION
VDD
VDD
14
V
DD(on)
V
DD(off )
Voltage
Regulator
13
V
Z
+
POR
GD
GND
-
12
Blank
3
-
I
ref
IAC
SOURCE
2
15k
OLP
OCP
ADC
+
+
V
OLP (th )
V
OCP (th)
11
-
5
V
S OURCE(th)
+
-
Peak
Control
DAC
+
-
FBSENSE
V
P k_Max (th )
-
t
VAUX
+
V
FS TA RT(th )
SGND
CTRL1
eOTP
CTRL2
4
Output
Overvoltage
8
VDD
Zero-current
Detect
I
CONNE CT
10
MUX
+
+
-
V
OV P(th )
16
-
V
ZCD(th)
VDD
FBAUX
9
V
CONNE CT(th)
-
+
I
CLA MP
3
CLAMP
Figure 1. CS1615/16 Block Diagram
A typical schematic using the CS1615/16 IC is shown on the
previous page.
Startup current is provided from a patent-pending, external, high-
voltage source-follower network. In addition to providing startup
current, this unique topology is integral in providing compatibility
with digital dimmers by ensuring V
DD
power is always available
to the IC. During normal operation, an auxiliary winding on the
flyback transformer or buck-boost inductor back-biases the
source-follower circuit and provides steady-state operating
current to the IC to improve system efficiency.
Rectified input voltage V
rect
is sensed as a current into pin IAC
and is used to control the adaptive dimmer-compatibility
algorithm and to extract the phase of the input voltage for output
dimming control. The SOURCE pin is used to provide a control
signal for the high-voltage source-follower circuit during Leading-
edge Mode and Trailing-edge Mode; it also provides the current
during startup.
The digital dual-mode controller is implemented with peak-
current mode primary-side regulation, which eliminates the need
for additional components to provide feedback from the
secondary and reduces system cost and complexity. Voltage
across a user-selected resistor is sensed through pin FBSENSE
to control the peak current of the primary-side inductor. Leading-
edge and trailing-edge blanking on pin FBSENSE prevents false
triggering. The required target LED current and average flyback
transformer and buck-boost inductor input current are set by
attaching resistors R
CTRL1
and R
CTRL2
on pins CTRL1 and
CTRL2, respectively. The controller ensures half line-cycle
averaged constant output current.
Pin FBAUX is used for zero-current detection to ensure
quasi-resonant switching of the single stage output. When an
external negative temperature coefficient (NTC) thermistor is
connected to pin eOTP, the CS1615/16 monitors the system
temperature, allowing the controller to reduce the output current
of the system. If the temperature reaches a designated high set
point, the IC is shut down and stops switching.
2
DS961F1
CS1615/16
2. PIN DESCRIPTION
No Connect
Rectifier Voltage Sense
Voltage Clamp Current Source
Source Ground
Source Switch
No Connect
No Connect
Dimmer Hold Current
NC
IAC
CLAMP
SGND
SOURCE
NC
NC
CTRL1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FBAUX
NC
VDD
GD
GND
FBSENSE
eOTP
CTRL2
Zero-current Detect
No Connect
IC Supply Voltage
Gate Drive
Ground
Flyback Current Sense
External Overtemperature Protection
LED Load Current
16-lead SOIC and TSSOP
Figure 2. CS1615/16 Pin Assignments
Pin Name
NC
IAC
CLAMP
SGND
SOURCE
NC
NC
CTRL1
CTRL2
eOTP
FBSENSE
GND
GD
VDD
NC
FBAUX
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
I/O
IN
IN
OUT
PWR
IN
IN
IN
IN
IN
IN
IN
PWR
OUT
PWR
-
IN
Description
No Connect
— Leave pin unconnected.
Rectifier Voltage Sense
— A current proportional to the rectified line voltage is fed
into this pin. The current is measured with an A/D converter.
Voltage Clamp Current Source
— Connect to a voltage clamp circuit on the
source-switched dimmer-compatibility circuit.
Source Ground
— Common reference current return for the SOURCE pin.
Source Switch
— Connected to the source of the source-switched external high-volt-
age FET.
No Connect
— Connect this pin to VDD using a 47k pull-up resistor.
No Connect
— Connect this pin to VDD using a 47kpull-up resistor.
Dimmer Hold Current
— Connect a resistor to this pin to set the minimum input cur-
rent being pulled by the flyback/buck-boost stage.
LED Load Current
— Connect a resistor to this pin to set the LED current.
External Overtemperature Protection
— Connect an external NTC thermistor to this
pin, allowing the internal A/D converter to sample the change to NTC resistance.
Feedback Current Sense
— The current flowing in the power FET is sensed across a
resistor. The resulting voltage is applied to this pin and digitized for use by the compu-
tational logic to determine the FET's duty cycle.
Ground
— Common reference. Current return for both the input signal portion of the
IC and the gate driver.
Gate Drive
— Gate drive for the power FET.
IC Supply Voltage
— Connect a storage capacitor to this pin to serve as a reservoir
for operating current for the device, including the gate drive current to the power tran-
sistor.
No Connect
— Leave pin unconnected.
Zero-current Detect
— Connect to the flyback/buck-boost inductor auxiliary winding
for demagnetization current zero-crossing detection.
DS961F1
3
CS1615/16
3. CHARACTERISTICS AND SPECIFICATIONS
3.1 Electrical Characteristics
Typical
characteristics conditions:
• T
A
= 25 °C, V
DD
= 12V, GND = 0 V
• All voltages are measured with respect to GND.
• Unless otherwise specified, all currents are positive
when flowing into the IC.
Minimum/Maximum
characteristics conditions:
• T
J
= -40°C to +125 °C, V
DD
= 11V to 17V, GND = 0 V
Parameter
VDD Supply Voltage
Operating Range
Turn-on Threshold Voltage
Turn-off Threshold Voltage (UVLO)
Zener Voltage
VDD Supply Current
Startup Supply Current
Operating Supply Current
Reference
Reference Current
CS1615
CS1616
Zero-current Detect
FBZCD Threshold
FBZCD Blanking
ZCD Sink Current
FBAUX Upper Voltage
Current Sense
Max Peak Control Threshold
Leading-edge Blanking
Delay to Output
Pulse Width Modulator
Minimum On Time
Maximum On Time
Minimum Switching Frequency
Maximum Switching Frequency
Gate Driver
Output Source Resistance
Output Sink Resistance
Rise Time
Fall Time
(Note 3)
(Note 2)
(Note 1)
Condition
After Turn-on
V
DD
Increasing
V
DD
Decreasing
I
DD
= 20mA
V
DD
<V
ST(th)
C
L
= 0.25nF, f
sw
70
kHz
Symbol
V
DD
V
ST(th)
V
STP(th)
V
Z
I
ST
Min
11
-
-
18.5
-
-
Typ
-
8.5
7.5
-
-
4.5
Max
17
-
-
19.8
200
-
Unit
V
V
V
V
A
mA
V
rect
= 200 V
V
rect
= 400 V
I
ref
-
-
-
-
-2
-
133
133
200
2
-
V
DD
+0.6
1.4
550
-
0.55
12.8
6
200
24
11
-
-
-
-
-
-
-
-
-
-
100
-
-
-
-
-
-
30
20
A
A
mV
s
mA
V
V
ns
ns
s
s
kHz
kHz
ns
ns
V
FBZCD(th)
t
FBZCB
I
ZCD
I
ZCD
= 1mA
V
Pk_Max(th)
t
LEB
-
-
-
-
-
t
FB(Min)
t
FB(Max)
Z
OUT
Z
OUT
C
L
= 0.25nF
C
L
= 0.25nF
-
-
-
-
-
-
4
DS961F1
CS1615/16
Parameter
Flyback/Buck-boost Protections
Overcurrent Protection (OCP)
Overvoltage Protection (OVP)
Open Loop Protection (OLP)
Pull-up Current Source – Maximum
Conductance Accuracy
Conductance Offset
Current Source Voltage Threshold
Internal Overtemperature Protection (iOTP)
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Notes:
1.
2.
3.
4.
5.
6.
7.
(Note 7)
(Note 7)
(Note 6)
(Note 6)
(Note 4)
(Note 5)
(Note 4)
Condition
Symbol
V
OCP(th)
V
OVP(th)
V
OLP(th)
I
CONNECT
Min
-
-
-
-
-
-
Typ
1.69
1.25
200
80
-
±250
1.25
135
14
Max
-
-
-
-
±5
-
-
-
-
Unit
V
V
mV
A
nS
V
ºC
ºC
External Overtemperature Protection (eOTP)
V
CONNECT(th)
T
SD
T
SD(Hy)
-
-
-
The CS1615/16 has an internal shunt regulator that limits the voltage on the VDD pin. Shunt regulation voltage V
Z
is defined in
the
VDD Supply Voltage
section on
page 4.
For test purposes, load capacitance C
L
is connected to pin GD and is equal to 0.25nF.
External circuitry should be designed to ensure that the ZCD current drawn from the internal clamp diode when it is forward biased
does not exceed specification.
Protection is implemented using pin FBSENSE. See the
CS1615/16 Block Diagram
on
page 2.
Protection is implemented using pin FBAUX. See the
CS1615/16 Block Diagram
on
page 2
The conductance is specified in Siemens (S or 1/). Each LSB of the internal ADC corresponds to 250nS or one parallel 4M
resistor. Full scale corresponds to 256 parallel 4M resistors or 15.625k.
Specifications are guaranteed by design and are characterized and correlated using statistical process methods.
DS961F1
5
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