FM25640B datasheet, PDF - EEWORLD Datasheet

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FM25640B: DescriptionSPECIALTY MEMORY CIRCUIT, PDSO8; Categorystorage; File Size384KB，13 Pages; ManufacturerCypress Semiconductor

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FM25640B Overview

SPECIALTY MEMORY CIRCUIT, PDSO8

FM25640B Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
Processing package description	Green, MS-012AA, SOIC-8
Lead-free	Yes
EU RoHS regulations	Yes
state	ACTIVE
Craftsmanship	CMOS
packaging shape	Rectangle
Package Size	SMALL OUTLINE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	1.27 mm
terminal coating	NOT SPECIFIED
Terminal location	pair
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
memory width	8
organize	8K × 8
storage density	65536 deg
operating mode	Synchronize
Number of digits	8192 words
Number of digits	8K
Memory IC type	memory circuit

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FM25640B

64Kb Serial 5V F-RAM Memory

Features

64K bit Ferroelectric Nonvolatile RAM



Organized as 8,192 x 8 bits



High Endurance 1 Trillion (10

) Read/Writes



38 Year Data Retention



NoDelay™ Writes



Advanced high-reliability ferroelectric process

Very Fast Serial Peripheral Interface - SPI



Up to 20 MHz maximum bus frequency



Direct hardware replacement for EEPROM



SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1)

Sophisticated Write Protection Scheme



Hardware Protection



Software Protection

Low Power Consumption



250

A

Active Current (1 MHz)



A

(typ.) Standby Current

Industry Standard Configuration



Industrial Temperature -40C to +85C



8-pin “Green”/RoHS SOIC (-G)

Description

The FM25640B is a 64-kilobit nonvolatile memory

employing an advanced ferroelectric process. A

ferroelectric random access memory or F-RAM is

nonvolatile but operates in other respects as a RAM.

It provides reliable data retention for 38 years while

eliminating the complexities, overhead, and system

level reliability problems caused by EEPROM and

other nonvolatile memories.

The FM25640B performs write operations at bus

speed. No write delays are incurred. Data is written to

the memory array immediately after it has been

successfully transferred to the device. The next bus

cycle may commence immediately without the need

for data polling. The FM25640B is capable of

supporting up to 10

read/write cycles, or a million

times more write cycles than EEPROM.

These capabilities make the FM25640B ideal for

nonvolatile memory applications requiring frequent

or rapid writes. Examples range from data collection,

where the number of write cycles may be critical, to

demanding industrial controls where the long write

time of EEPROM can cause data loss.

The FM25640B provides substantial benefits to users

of serial EEPROM, in a hardware drop-in

replacement. The FM25640B uses the high-speed SPI

bus, which enhances the high-speed write capability

of F-RAM technology. The specifications are

guaranteed over an industrial temperature range of

-40°C to +85°C.

Pin Configuration

VSS

VDD

HOLD

SCK

Pin Names

/CS

/HOLD

/WP

SCK

VDD

VSS

Function

Chip Select

Hold

Write Protect

Serial Clock

Serial Data Input

Serial Data Output

Ground

Ordering Information

FM25640B-G

FM25640B-GTR

“Green”/RoHS 8-pin SOIC

“Green”/RoHS 8-pin SOIC,

Tape & Reel

This product conforms to specifications per the terms of the Ramtron

standard warranty. The product has completed Ramtron’s internal

qualification testing and has reached production status.

Rev. 3.0

Jan. 2012

Ramtron International Corporation

1850 Ramtron Drive, Colorado Springs, CO 80921

(800) 545-FRAM, (719) 481-7000

www.ramtron.com

Page 1 of 13

FM25640B - 64Kb 5V SPI F-RAM

HOLD

SCK

Instruction Decode

Clock Generator

Control Logic

Write Protect

1,024 x 64

FRAM Array

Instruction Register

Address Register

Counter

Data I/O Register

Nonvolatile Status

Figure 1. Block Diagram

Pin Description

Pin Name

/CS

I/O

Input

Pin Description

Chip Select: Enables and disables the device. When /CS is high, the output pin SO is hi-

Z, all other inputs are ignored, and the device remains in a low-power standby mode.

When /CS is low, the part will respond to the SCK signal. A falling edge on /CS must

occur for every op-code.

Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on the

rising edge and outputs occur on the falling edge. The device is static so the clock

frequency may be any value between 0 and 20 MHz and may be interrupted at any time.

Hold: The /HOLD signal is used when the host CPU must interrupt a memory operation

for another task. Asserting the /HOLD signal low pauses the current operation. The

device ignores SCK and /CS. All transitions on /HOLD must occur while SCK is low.

Write Protect: This pin prevents write operations to the status register. This is critical

since other write protection features are controlled through the status register. A

complete explanation of write protection is provided below. *Note that the function of

/WP is different from the FM25040 where it prevents all writes to the part.

Serial Input: SI is the data input pin. It is sampled on the rising edge of SCK and is

ignored otherwise. It should always be driven to a valid logic level to meet IDD

specifications.

* SI may be connected to SO for a single pin data interface.

Serial Output: SO is the data output pin. It is driven during read cycles and remains hi-Z

at all other times including when HOLD\ is low. Data transitions are driven on the falling

edge of the serial clock.

* SO can be connected to SI for a single pin data interface since the part communicates

in half-duplex.

Supply Voltage: 5V

Ground

SCK

Input

/HOLD

Input

/WP

Input

Output

VDD

VSS

Supply

Rev. 3.0

Jan. 2012

2 of 13

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